soc: renesas: ra: Move configs from board deconfig into SoC deconfig

quytranpzz · kartben · commit 292f7454d447 · 2025-02-18T18:38:15.000+01:00
- Move config BUILD_OUTPUT_HEX and CLOK_CONTROL from board deconfig
into SoC deconfig
- Add clock-frequency in dts to get config
SYS_CLOCK_HW_CYCLES_PER_SEC from dts

Signed-off-by: Quy Tran &lt;quy.tran.pz@renesas.com&gt;
diff --git a/boards/renesas/ek_ra2a1/ek_ra2a1_defconfig b/boards/renesas/ek_ra2a1/ek_ra2a1_defconfig
@@ -1,8 +1,6 @@
 # Copyright (c) 2024 TOKITA Hiroshi
 # SPDX-License-Identifier: Apache-2.0
 
-CONFIG_SYS_CLOCK_HW_CYCLES_PER_SEC=48000000
-
 # Enable GPIO
 CONFIG_GPIO=y
 
@@ -11,6 +9,3 @@ CONFIG_SERIAL=y
 CONFIG_UART_CONSOLE=y
 CONFIG_UART_INTERRUPT_DRIVEN=y
 CONFIG_CONSOLE=y
-
-CONFIG_BUILD_OUTPUT_HEX=y
-CONFIG_CLOCK_CONTROL=y
diff --git a/boards/renesas/ek_ra4e2/ek_ra4e2_defconfig b/boards/renesas/ek_ra4e2/ek_ra4e2_defconfig
@@ -1,8 +1,6 @@
 # Copyright (c) 2024 Renesas Electronics Corporation
 # SPDX-License-Identifier: Apache-2.0
 
-CONFIG_SYS_CLOCK_HW_CYCLES_PER_SEC=100000000
-
 # Enable GPIO
 CONFIG_GPIO=y
 
@@ -11,6 +9,3 @@ CONFIG_SERIAL=y
 CONFIG_UART_INTERRUPT_DRIVEN=y
 CONFIG_UART_CONSOLE=y
 CONFIG_CONSOLE=y
-
-CONFIG_BUILD_OUTPUT_HEX=y
-CONFIG_CLOCK_CONTROL=y
diff --git a/boards/renesas/ek_ra4m2/ek_ra4m2_defconfig b/boards/renesas/ek_ra4m2/ek_ra4m2_defconfig
@@ -1,8 +1,6 @@
 # Copyright (c) 2024 Renesas Electronics Corporation
 # SPDX-License-Identifier: Apache-2.0
 
-CONFIG_SYS_CLOCK_HW_CYCLES_PER_SEC=100000000
-
 # Enable GPIO
 CONFIG_GPIO=y
 
@@ -11,6 +9,3 @@ CONFIG_SERIAL=y
 CONFIG_UART_INTERRUPT_DRIVEN=y
 CONFIG_UART_CONSOLE=y
 CONFIG_CONSOLE=y
-
-CONFIG_BUILD_OUTPUT_HEX=y
-CONFIG_CLOCK_CONTROL=y
diff --git a/boards/renesas/ek_ra4m3/ek_ra4m3_defconfig b/boards/renesas/ek_ra4m3/ek_ra4m3_defconfig
@@ -1,8 +1,6 @@
 # Copyright (c) 2024 Renesas Electronics Corporation
 # SPDX-License-Identifier: Apache-2.0
 
-CONFIG_SYS_CLOCK_HW_CYCLES_PER_SEC=100000000
-
 # Enable GPIO
 CONFIG_GPIO=y
 
@@ -11,6 +9,3 @@ CONFIG_SERIAL=y
 CONFIG_UART_INTERRUPT_DRIVEN=y
 CONFIG_UART_CONSOLE=y
 CONFIG_CONSOLE=y
-
-CONFIG_BUILD_OUTPUT_HEX=y
-CONFIG_CLOCK_CONTROL=y
diff --git a/boards/renesas/ek_ra4w1/ek_ra4w1_defconfig b/boards/renesas/ek_ra4w1/ek_ra4w1_defconfig
@@ -1,8 +1,6 @@
 # Copyright (c) 2024 Renesas Electronics Corporation
 # SPDX-License-Identifier: Apache-2.0
 
-CONFIG_SYS_CLOCK_HW_CYCLES_PER_SEC=48000000
-
 # Enable GPIO
 CONFIG_GPIO=y
 
@@ -11,6 +9,3 @@ CONFIG_SERIAL=y
 CONFIG_UART_INTERRUPT_DRIVEN=y
 CONFIG_UART_CONSOLE=y
 CONFIG_CONSOLE=y
-
-CONFIG_BUILD_OUTPUT_HEX=y
-CONFIG_CLOCK_CONTROL=y
diff --git a/boards/renesas/ek_ra6e2/ek_ra6e2_defconfig b/boards/renesas/ek_ra6e2/ek_ra6e2_defconfig
@@ -1,8 +1,6 @@
 # Copyright (c) 2024 Renesas Electronics Corporation
 # SPDX-License-Identifier: Apache-2.0
 
-CONFIG_SYS_CLOCK_HW_CYCLES_PER_SEC=200000000
-
 # Enable GPIO
 CONFIG_GPIO=y
 
@@ -11,6 +9,3 @@ CONFIG_SERIAL=y
 CONFIG_UART_INTERRUPT_DRIVEN=y
 CONFIG_UART_CONSOLE=y
 CONFIG_CONSOLE=y
-
-CONFIG_BUILD_OUTPUT_HEX=y
-CONFIG_CLOCK_CONTROL=y
diff --git a/boards/renesas/ek_ra6m1/ek_ra6m1_defconfig b/boards/renesas/ek_ra6m1/ek_ra6m1_defconfig
@@ -1,14 +1,9 @@
 # Copyright (c) 2024 Renesas Electronics Corporation
 # SPDX-License-Identifier: Apache-2.0
 
-CONFIG_SYS_CLOCK_HW_CYCLES_PER_SEC=120000000
-
 # Enable GPIO
 CONFIG_GPIO=y
 
-CONFIG_BUILD_OUTPUT_HEX=y
-CONFIG_CLOCK_CONTROL=y
-
 # Enable Console
 CONFIG_SERIAL=y
 CONFIG_UART_CONSOLE=y
diff --git a/boards/renesas/ek_ra6m2/ek_ra6m2_defconfig b/boards/renesas/ek_ra6m2/ek_ra6m2_defconfig
@@ -1,14 +1,9 @@
 # Copyright (c) 2024 Renesas Electronics Corporation
 # SPDX-License-Identifier: Apache-2.0
 
-CONFIG_SYS_CLOCK_HW_CYCLES_PER_SEC=120000000
-
 # Enable GPIO
 CONFIG_GPIO=y
 
-CONFIG_BUILD_OUTPUT_HEX=y
-CONFIG_CLOCK_CONTROL=y
-
 # Enable Console
 CONFIG_SERIAL=y
 CONFIG_UART_CONSOLE=y
diff --git a/boards/renesas/ek_ra6m3/ek_ra6m3_defconfig b/boards/renesas/ek_ra6m3/ek_ra6m3_defconfig
@@ -1,8 +1,6 @@
 # Copyright (c) 2024 Renesas Electronics Corporation
 # SPDX-License-Identifier: Apache-2.0
 
-CONFIG_SYS_CLOCK_HW_CYCLES_PER_SEC=120000000
-
 # Enable GPIO
 CONFIG_GPIO=y
 
@@ -11,6 +9,3 @@ CONFIG_SERIAL=y
 CONFIG_UART_INTERRUPT_DRIVEN=y
 CONFIG_CONSOLE=y
 CONFIG_UART_CONSOLE=y
-
-CONFIG_BUILD_OUTPUT_HEX=y
-CONFIG_CLOCK_CONTROL=y
diff --git a/boards/renesas/ek_ra6m4/ek_ra6m4_defconfig b/boards/renesas/ek_ra6m4/ek_ra6m4_defconfig
@@ -1,8 +1,6 @@
 # Copyright (c) 2024 Renesas Electronics Corporation
 # SPDX-License-Identifier: Apache-2.0
 
-CONFIG_SYS_CLOCK_HW_CYCLES_PER_SEC=200000000
-
 # Enable GPIO
 CONFIG_GPIO=y
 
@@ -11,6 +9,3 @@ CONFIG_SERIAL=y
 CONFIG_UART_INTERRUPT_DRIVEN=y
 CONFIG_CONSOLE=y
 CONFIG_UART_CONSOLE=y
-
-CONFIG_BUILD_OUTPUT_HEX=y
-CONFIG_CLOCK_CONTROL=y
diff --git a/boards/renesas/ek_ra6m5/ek_ra6m5_defconfig b/boards/renesas/ek_ra6m5/ek_ra6m5_defconfig
@@ -1,14 +1,9 @@
 # Copyright (c) 2024 Renesas Electronics Corporation
 # SPDX-License-Identifier: Apache-2.0
 
-CONFIG_SYS_CLOCK_HW_CYCLES_PER_SEC=200000000
-
 # Enable GPIO
 CONFIG_GPIO=y
 
-CONFIG_BUILD_OUTPUT_HEX=y
-CONFIG_CLOCK_CONTROL=y
-
 # Enable Console
 CONFIG_SERIAL=y
 CONFIG_UART_CONSOLE=y
diff --git a/boards/renesas/ek_ra8d1/ek_ra8d1_defconfig b/boards/renesas/ek_ra8d1/ek_ra8d1_defconfig
@@ -1,8 +1,6 @@
 # Copyright (c) 2024 Renesas Electronics Corporation
 # SPDX-License-Identifier: Apache-2.0
 
-CONFIG_SYS_CLOCK_HW_CYCLES_PER_SEC=480000000
-
 # Enable GPIO
 CONFIG_GPIO=y
 
@@ -11,6 +9,3 @@ CONFIG_SERIAL=y
 CONFIG_UART_CONSOLE=y
 CONFIG_UART_INTERRUPT_DRIVEN=y
 CONFIG_CONSOLE=y
-CONFIG_CLOCK_CONTROL=y
-
-CONFIG_BUILD_OUTPUT_HEX=y
diff --git a/boards/renesas/ek_ra8m1/ek_ra8m1_defconfig b/boards/renesas/ek_ra8m1/ek_ra8m1_defconfig
@@ -1,8 +1,6 @@
 # Copyright (c) 2024 Renesas Electronics Corporation
 # SPDX-License-Identifier: Apache-2.0
 
-CONFIG_SYS_CLOCK_HW_CYCLES_PER_SEC=480000000
-
 # Enable GPIO
 CONFIG_GPIO=y
 
@@ -11,6 +9,3 @@ CONFIG_SERIAL=y
 CONFIG_UART_CONSOLE=y
 CONFIG_UART_INTERRUPT_DRIVEN=y
 CONFIG_CONSOLE=y
-
-CONFIG_BUILD_OUTPUT_HEX=y
-CONFIG_CLOCK_CONTROL=y
diff --git a/boards/renesas/fpb_ra6e1/fpb_ra6e1_defconfig b/boards/renesas/fpb_ra6e1/fpb_ra6e1_defconfig
@@ -1,17 +1,11 @@
 # Copyright (c) 2024 Renesas Electronics Corporation
 # SPDX-License-Identifier: Apache-2.0
 
-CONFIG_SYS_CLOCK_HW_CYCLES_PER_SEC=200000000
-
 # Enable GPIO
 CONFIG_GPIO=y
 
-CONFIG_BUILD_OUTPUT_HEX=y
-
 # Enable Console
 CONFIG_SERIAL=y
 CONFIG_UART_INTERRUPT_DRIVEN=y
 CONFIG_UART_CONSOLE=y
 CONFIG_CONSOLE=y
-
-CONFIG_CLOCK_CONTROL=y
diff --git a/boards/renesas/fpb_ra6e2/fpb_ra6e2_defconfig b/boards/renesas/fpb_ra6e2/fpb_ra6e2_defconfig
@@ -1,8 +1,6 @@
 # Copyright (c) 2024 Renesas Electronics Corporation
 # SPDX-License-Identifier: Apache-2.0
 
-CONFIG_SYS_CLOCK_HW_CYCLES_PER_SEC=200000000
-
 # Enable GPIO
 CONFIG_GPIO=y
 
@@ -11,6 +9,3 @@ CONFIG_SERIAL=y
 CONFIG_UART_INTERRUPT_DRIVEN=y
 CONFIG_UART_CONSOLE=y
 CONFIG_CONSOLE=y
-
-CONFIG_BUILD_OUTPUT_HEX=y
-CONFIG_CLOCK_CONTROL=y
diff --git a/boards/renesas/mck_ra8t1/mck_ra8t1_defconfig b/boards/renesas/mck_ra8t1/mck_ra8t1_defconfig
@@ -1,8 +1,6 @@
 # Copyright (c) 2024 Renesas Electronics Corporation
 # SPDX-License-Identifier: Apache-2.0
 
-CONFIG_SYS_CLOCK_HW_CYCLES_PER_SEC=480000000
-
 # Enable GPIO
 CONFIG_GPIO=y
 
@@ -11,7 +9,3 @@ CONFIG_SERIAL=y
 CONFIG_UART_CONSOLE=y
 CONFIG_UART_INTERRUPT_DRIVEN=y
 CONFIG_CONSOLE=y
-
-CONFIG_CLOCK_CONTROL=y
-
-CONFIG_BUILD_OUTPUT_HEX=y
diff --git a/dts/arm/renesas/ra/ra2/r7fa2a1xh.dtsi b/dts/arm/renesas/ra/ra2/r7fa2a1xh.dtsi
@@ -141,6 +141,7 @@
 
 			iclk: iclk {
 				compatible = "renesas,ra-cgc-pclk";
+				clock-frequency = <48000000>;
 				div = <1>;
 				#clock-cells = <2>;
 				status = "okay";
diff --git a/dts/arm/renesas/ra/ra4/r7fa4e2b93cfm.dtsi b/dts/arm/renesas/ra/ra4/r7fa4e2b93cfm.dtsi
@@ -155,6 +155,7 @@
 
 			iclk: iclk {
 				compatible = "renesas,ra-cgc-pclk";
+				clock-frequency = <100000000>;
 				div = <2>;
 				#clock-cells = <2>;
 				status = "okay";
diff --git a/dts/arm/renesas/ra/ra4/r7fa4m2ax.dtsi b/dts/arm/renesas/ra/ra4/r7fa4m2ax.dtsi
@@ -215,6 +215,7 @@
 
 			iclk: iclk {
 				compatible = "renesas,ra-cgc-pclk";
+				clock-frequency = <100000000>;
 				div = <2>;
 				#clock-cells = <2>;
 				status = "okay";
diff --git a/dts/arm/renesas/ra/ra4/r7fa4m3ax.dtsi b/dts/arm/renesas/ra/ra4/r7fa4m3ax.dtsi
@@ -226,6 +226,7 @@
 
 			iclk: iclk {
 				compatible = "renesas,ra-cgc-pclk";
+				clock-frequency = <100000000>;
 				div = <2>;
 				#clock-cells = <2>;
 				status = "okay";
diff --git a/dts/arm/renesas/ra/ra4/r7fa4w1ad2cng.dtsi b/dts/arm/renesas/ra/ra4/r7fa4w1ad2cng.dtsi
@@ -117,6 +117,7 @@
 
 			iclk: iclk {
 				compatible = "renesas,ra-cgc-pclk";
+				clock-frequency = <48000000>;
 				div = <1>;
 				#clock-cells = <2>;
 				status = "okay";
diff --git a/dts/arm/renesas/ra/ra6/r7fa6e10x.dtsi b/dts/arm/renesas/ra/ra6/r7fa6e10x.dtsi
@@ -194,6 +194,7 @@
 
 			iclk: iclk {
 				compatible = "renesas,ra-cgc-pclk";
+				clock-frequency = <200000000>;
 				div = <1>;
 				#clock-cells = <2>;
 				status = "okay";
diff --git a/dts/arm/renesas/ra/ra6/r7fa6e2bx.dtsi b/dts/arm/renesas/ra/ra6/r7fa6e2bx.dtsi
@@ -153,6 +153,7 @@
 
 			iclk: iclk {
 				compatible = "renesas,ra-cgc-pclk";
+				clock-frequency = <200000000>;
 				div = <1>;
 				#clock-cells = <2>;
 				status = "okay";
diff --git a/dts/arm/renesas/ra/ra6/r7fa6m1ad3cfp.dtsi b/dts/arm/renesas/ra/ra6/r7fa6m1ad3cfp.dtsi
@@ -108,6 +108,7 @@
 
 			iclk: iclk {
 				compatible = "renesas,ra-cgc-pclk";
+				clock-frequency = <120000000>;
 				div = <2>;
 				#clock-cells = <2>;
 				status = "okay";
diff --git a/dts/arm/renesas/ra/ra6/r7fa6m2ax.dtsi b/dts/arm/renesas/ra/ra6/r7fa6m2ax.dtsi
@@ -140,6 +140,7 @@
 
 			iclk: iclk {
 				compatible = "renesas,ra-cgc-pclk";
+				clock-frequency = <120000000>;
 				div = <2>;
 				#clock-cells = <2>;
 				status = "okay";
diff --git a/dts/arm/renesas/ra/ra6/r7fa6m3ax.dtsi b/dts/arm/renesas/ra/ra6/r7fa6m3ax.dtsi
@@ -199,6 +199,7 @@
 
 			iclk: iclk {
 				compatible = "renesas,ra-cgc-pclk";
+				clock-frequency = <120000000>;
 				div = <2>;
 				#clock-cells = <2>;
 				status = "okay";
diff --git a/dts/arm/renesas/ra/ra6/r7fa6m4ax.dtsi b/dts/arm/renesas/ra/ra6/r7fa6m4ax.dtsi
@@ -302,6 +302,7 @@
 
 			iclk: iclk {
 				compatible = "renesas,ra-cgc-pclk";
+				clock-frequency = <200000000>;
 				div = <1>;
 				#clock-cells = <2>;
 				status = "okay";
diff --git a/dts/arm/renesas/ra/ra6/r7fa6m5xh.dtsi b/dts/arm/renesas/ra/ra6/r7fa6m5xh.dtsi
@@ -354,6 +354,7 @@
 
 			iclk: iclk {
 				compatible = "renesas,ra-cgc-pclk";
+				clock-frequency = <200000000>;
 				div = <1>;
 				#clock-cells = <2>;
 				status = "okay";
diff --git a/dts/arm/renesas/ra/ra8/r7fa8d1xh.dtsi b/dts/arm/renesas/ra/ra8/r7fa8d1xh.dtsi
@@ -155,6 +155,7 @@
 
 			cpuclk: cpuclk {
 				compatible = "renesas,ra-cgc-pclk";
+				clock-frequency = <480000000>;
 				div = <1>;
 				#clock-cells = <2>;
 				status = "okay";
diff --git a/dts/arm/renesas/ra/ra8/r7fa8m1xh.dtsi b/dts/arm/renesas/ra/ra8/r7fa8m1xh.dtsi
@@ -125,6 +125,7 @@
 
 			cpuclk: cpuclk {
 				compatible = "renesas,ra-cgc-pclk";
+				clock-frequency = <480000000>;
 				div = <1>;
 				#clock-cells = <2>;
 				status = "okay";
diff --git a/dts/arm/renesas/ra/ra8/r7fa8t1xh.dtsi b/dts/arm/renesas/ra/ra8/r7fa8t1xh.dtsi
@@ -122,6 +122,7 @@
 
 			cpuclk: cpuclk {
 				compatible = "renesas,ra-cgc-pclk";
+				clock-frequency = <480000000>;
 				div = <1>;
 				#clock-cells = <2>;
 				status = "okay";
diff --git a/soc/renesas/ra/ra2a1/Kconfig.defconfig b/soc/renesas/ra/ra2a1/Kconfig.defconfig
@@ -6,4 +6,15 @@ if SOC_SERIES_RA2A1
 config NUM_IRQS
 	default 32
 
+DT_ICLK_PATH := $(dt_nodelabel_path,iclk)
+
+config SYS_CLOCK_HW_CYCLES_PER_SEC
+	default $(dt_node_int_prop_int,$(DT_ICLK_PATH),clock-frequency)
+
+config BUILD_OUTPUT_HEX
+	default y
+
+config CLOCK_CONTROL
+	default y
+
 endif # SOC_SERIES_RA2A1
diff --git a/soc/renesas/ra/ra4e2/Kconfig.defconfig b/soc/renesas/ra/ra4e2/Kconfig.defconfig
diff --git a/soc/renesas/ra/ra4m2/Kconfig.defconfig b/soc/renesas/ra/ra4m2/Kconfig.defconfig
diff --git a/soc/renesas/ra/ra4m3/Kconfig.defconfig b/soc/renesas/ra/ra4m3/Kconfig.defconfig
diff --git a/soc/renesas/ra/ra4w1/Kconfig.defconfig b/soc/renesas/ra/ra4w1/Kconfig.defconfig
diff --git a/soc/renesas/ra/ra6e1/Kconfig.defconfig b/soc/renesas/ra/ra6e1/Kconfig.defconfig
diff --git a/soc/renesas/ra/ra6e2/Kconfig.defconfig b/soc/renesas/ra/ra6e2/Kconfig.defconfig
diff --git a/soc/renesas/ra/ra6m1/Kconfig.defconfig b/soc/renesas/ra/ra6m1/Kconfig.defconfig
diff --git a/soc/renesas/ra/ra6m2/Kconfig.defconfig b/soc/renesas/ra/ra6m2/Kconfig.defconfig
diff --git a/soc/renesas/ra/ra6m3/Kconfig.defconfig b/soc/renesas/ra/ra6m3/Kconfig.defconfig
diff --git a/soc/renesas/ra/ra6m4/Kconfig.defconfig b/soc/renesas/ra/ra6m4/Kconfig.defconfig
diff --git a/soc/renesas/ra/ra6m5/Kconfig.defconfig b/soc/renesas/ra/ra6m5/Kconfig.defconfig
diff --git a/soc/renesas/ra/ra8d1/Kconfig.defconfig b/soc/renesas/ra/ra8d1/Kconfig.defconfig
diff --git a/soc/renesas/ra/ra8m1/Kconfig.defconfig b/soc/renesas/ra/ra8m1/Kconfig.defconfig
diff --git a/soc/renesas/ra/ra8t1/Kconfig.defconfig b/soc/renesas/ra/ra8t1/Kconfig.defconfig
