|
83 | 83 | ranges = <0x0 0x443C0000 DT_SIZE_K(140)>;
|
84 | 84 | };
|
85 | 85 |
|
| 86 | + power_mode3_domain: power_mode3_domain { |
| 87 | + compatible = "power-domain-soc-state-change"; |
| 88 | + onoff-power-states = <&standby>; |
| 89 | + #power-domain-cells = <0>; |
| 90 | + }; |
86 | 91 | };
|
87 | 92 |
|
88 | 93 | &sram {
|
|
189 | 194 | reg = <0x14000 0x1000>;
|
190 | 195 | status = "okay";
|
191 | 196 | interrupts = <123 0>;
|
| 197 | + power-domains = <&power_mode3_domain>; |
192 | 198 | };
|
193 | 199 |
|
194 | 200 | wwdt: watchdog@e000 {
|
|
211 | 217 | #gpio-cells = <2>;
|
212 | 218 | reg = <0>;
|
213 | 219 | int-source = "pint";
|
| 220 | + power-domains = <&power_mode3_domain>; |
214 | 221 | };
|
215 | 222 |
|
216 | 223 | hsgpio1: gpio@1 {
|
|
219 | 226 | #gpio-cells = <2>;
|
220 | 227 | reg = <1>;
|
221 | 228 | int-source = "pint";
|
| 229 | + power-domains = <&power_mode3_domain>; |
222 | 230 | };
|
223 | 231 | };
|
224 | 232 |
|
|
228 | 236 | interrupts = <50 1>;
|
229 | 237 | interrupt-names = "usb_otg";
|
230 | 238 | num-bidir-endpoints = <8>;
|
| 239 | + power-domains = <&power_mode3_domain>; |
231 | 240 | status = "disabled";
|
232 | 241 | };
|
233 | 242 |
|
|
240 | 249 | dmas = <&dma0 0>, <&dma0 1>;
|
241 | 250 | dma-names = "rx", "tx";
|
242 | 251 | zephyr,disabling-power-states = <&suspend &standby>;
|
| 252 | + power-domains = <&power_mode3_domain>; |
243 | 253 | status = "disabled";
|
244 | 254 | };
|
245 | 255 |
|
|
252 | 262 | dmas = <&dma0 2>, <&dma0 3>;
|
253 | 263 | dma-names = "rx", "tx";
|
254 | 264 | zephyr,disabling-power-states = <&suspend &standby>;
|
| 265 | + power-domains = <&power_mode3_domain>; |
255 | 266 | status = "disabled";
|
256 | 267 | };
|
257 | 268 |
|
|
264 | 275 | dmas = <&dma0 4>, <&dma0 5>;
|
265 | 276 | dma-names = "rx", "tx";
|
266 | 277 | zephyr,disabling-power-states = <&suspend &standby>;
|
| 278 | + power-domains = <&power_mode3_domain>; |
267 | 279 | status = "disabled";
|
268 | 280 | };
|
269 | 281 |
|
|
276 | 288 | dmas = <&dma0 6>, <&dma0 7>;
|
277 | 289 | dma-names = "rx", "tx";
|
278 | 290 | zephyr,disabling-power-states = <&suspend &standby>;
|
| 291 | + power-domains = <&power_mode3_domain>; |
279 | 292 | status = "disabled";
|
280 | 293 | };
|
281 | 294 |
|
|
288 | 301 | dmas = <&dma0 26>, <&dma0 27>;
|
289 | 302 | dma-names = "rx", "tx";
|
290 | 303 | zephyr,disabling-power-states = <&suspend &standby>;
|
| 304 | + power-domains = <&power_mode3_domain>; |
291 | 305 | status = "disabled";
|
292 | 306 | };
|
293 | 307 |
|
|
319 | 333 | compatible = "nxp,wifi";
|
320 | 334 | /* first index is the imu interrupt, the second is the wakeup done interrupt */
|
321 | 335 | interrupts = <72 2>, <64 2>;
|
| 336 | + power-domains = <&power_mode3_domain>; |
322 | 337 | };
|
323 | 338 |
|
324 | 339 | dma0: dma-controller@104000 {
|
|
328 | 343 | status = "disabled";
|
329 | 344 | #dma-cells = <1>;
|
330 | 345 | dma-channels = <33>;
|
| 346 | + power-domains = <&power_mode3_domain>; |
331 | 347 | };
|
332 | 348 |
|
333 | 349 | lcdic: lcdic@128000 {
|
|
339 | 355 | #size-cells = <0>;
|
340 | 356 | clocks = <&clkctl1 MCUX_LCDIC_CLK>;
|
341 | 357 | dmas = <&dma0 0>;
|
| 358 | + power-domains = <&power_mode3_domain>; |
342 | 359 | };
|
343 | 360 |
|
344 | 361 | rtc: rtc@30000 {
|
|
362 | 379 | mode = <0>;
|
363 | 380 | input = <0>;
|
364 | 381 | prescale = <0>;
|
| 382 | + power-domains = <&power_mode3_domain>; |
365 | 383 | };
|
366 | 384 |
|
367 | 385 | ctimer1: ctimer@29000 {
|
|
374 | 392 | mode = <0>;
|
375 | 393 | input = <0>;
|
376 | 394 | prescale = <0>;
|
| 395 | + power-domains = <&power_mode3_domain>; |
377 | 396 | };
|
378 | 397 |
|
379 | 398 | ctimer2: ctimer@2a000 {
|
|
386 | 405 | mode = <0>;
|
387 | 406 | input = <0>;
|
388 | 407 | prescale = <0>;
|
| 408 | + power-domains = <&power_mode3_domain>; |
389 | 409 | };
|
390 | 410 |
|
391 | 411 | ctimer3: ctimer@2b000 {
|
|
398 | 418 | mode = <0>;
|
399 | 419 | input = <0>;
|
400 | 420 | prescale = <0>;
|
| 421 | + power-domains = <&power_mode3_domain>; |
401 | 422 | };
|
402 | 423 |
|
403 | 424 | sctimer: pwm@146000 {
|
|
408 | 429 | status = "disabled";
|
409 | 430 | prescaler = <8>;
|
410 | 431 | #pwm-cells = <3>;
|
| 432 | + power-domains = <&power_mode3_domain>; |
411 | 433 | };
|
412 | 434 |
|
413 | 435 | mrt0: mrt@2d000 {
|
|
420 | 442 | resets = <&rstctl1 NXP_SYSCON_RESET(2, 8)>;
|
421 | 443 | #address-cells = <1>;
|
422 | 444 | #size-cells = <0>;
|
| 445 | + power-domains = <&power_mode3_domain>; |
423 | 446 |
|
424 | 447 | mrt0_channel0: mrt0_channel@0 {
|
425 | 448 | compatible = "nxp,mrt-channel";
|
|
453 | 476 | resets = <&rstctl0 NXP_SYSCON_RESET(2, 26)>;
|
454 | 477 | #address-cells = <1>;
|
455 | 478 | #size-cells = <0>;
|
| 479 | + power-domains = <&power_mode3_domain>; |
456 | 480 |
|
457 | 481 | mrt1_channel0: mrt1_channel@0 {
|
458 | 482 | compatible = "nxp,mrt-channel";
|
|
484 | 508 | interrupts = <25 0>;
|
485 | 509 | status = "disabled";
|
486 | 510 | clocks = <&clkctl1 MCUX_DMIC_CLK>;
|
| 511 | + power-domains = <&power_mode3_domain>; |
487 | 512 |
|
488 | 513 | pdmc0: dmic-channel@0 {
|
489 | 514 | reg = <0>;
|
|
521 | 546 | interrupts = <112 0>;
|
522 | 547 | status = "disabled";
|
523 | 548 | #io-channel-cells = <1>;
|
| 549 | + power-domains = <&power_mode3_domain>; |
524 | 550 | };
|
525 | 551 |
|
526 | 552 | adc1: gau_adc1@38100 {
|
|
529 | 555 | interrupts = <111 0>;
|
530 | 556 | status = "disabled";
|
531 | 557 | #io-channel-cells = <1>;
|
| 558 | + power-domains = <&power_mode3_domain>; |
532 | 559 | };
|
533 | 560 |
|
534 | 561 | dac0: dac@38200 {
|
|
537 | 564 | interrupts = <108 0>;
|
538 | 565 | status = "disabled";
|
539 | 566 | #io-channel-cells = <0>;
|
| 567 | + power-domains = <&power_mode3_domain>; |
540 | 568 | };
|
541 | 569 | };
|
542 | 570 |
|
|
555 | 583 |
|
556 | 584 | hci: hci_ble {
|
557 | 585 | compatible = "nxp,hci-ble";
|
| 586 | + power-domains = <&power_mode3_domain>; |
558 | 587 | };
|
559 | 588 |
|
560 | 589 | hdlc_rcp_if: hdlc_rcp_if {
|
561 | 590 | compatible = "nxp,hdlc-rcp-if";
|
562 | 591 | interrupts = <90 2>, <82 2>;
|
563 | 592 | interrupt-names = "hdlc_rcp_if_int", "wakeup_int";
|
| 593 | + power-domains = <&power_mode3_domain>; |
564 | 594 | };
|
565 | 595 |
|
566 | 596 | enet: enet@138000 {
|
|
574 | 604 | nxp,mdio = <&enet_mdio>;
|
575 | 605 | nxp,ptp-clock = <&enet_ptp_clock>;
|
576 | 606 | status = "disabled";
|
| 607 | + power-domains = <&power_mode3_domain>; |
577 | 608 | };
|
578 | 609 | enet_mdio: mdio {
|
579 | 610 | compatible = "nxp,enet-mdio";
|
580 | 611 | status = "disabled";
|
581 | 612 | #address-cells = <1>;
|
582 | 613 | #size-cells = <0>;
|
| 614 | + power-domains = <&power_mode3_domain>; |
583 | 615 | };
|
584 | 616 | enet_ptp_clock: ptp-clock {
|
585 | 617 | compatible = "nxp,enet-ptp-clock";
|
586 | 618 | interrupts = <116 0>;
|
587 | 619 | status = "disabled";
|
588 | 620 | clocks = <&clkctl1 MCUX_ENET_PLL>;
|
| 621 | + power-domains = <&power_mode3_domain>; |
589 | 622 | };
|
590 | 623 | };
|
591 | 624 | };
|
|
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