@@ -886,6 +886,37 @@ static int flash_flexspi_nor_check_jedec(struct flash_flexspi_nor_data *data,
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/* Switch on manufacturer and vendor ID */
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switch (vendor_id & 0xFFFF ) {
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+ case 0x40ef :
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+ /* W25Q512JV flash, use 4 byte read/write */
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+ flexspi_lut [READ ][0 ] = FLEXSPI_LUT_SEQ (
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+ kFLEXSPI_Command_SDR , kFLEXSPI_1PAD , SPI_NOR_CMD_4READ_4B ,
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+ kFLEXSPI_Command_RADDR_SDR , kFLEXSPI_4PAD , 32 );
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+ /* Flash needs 6 dummy cycles (at 104MHz) */
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+ flexspi_lut [READ ][1 ] = FLEXSPI_LUT_SEQ (
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+ kFLEXSPI_Command_DUMMY_SDR , kFLEXSPI_4PAD , 6 ,
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+ kFLEXSPI_Command_READ_SDR , kFLEXSPI_4PAD , 0x04 );
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+ /* Only 1S-1S-4S page program supported */
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+ flexspi_lut [PAGE_PROGRAM ][0 ] = FLEXSPI_LUT_SEQ (
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+ kFLEXSPI_Command_SDR , kFLEXSPI_1PAD , SPI_NOR_CMD_PP_1_1_4_4B ,
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+ kFLEXSPI_Command_RADDR_SDR , kFLEXSPI_1PAD , 32 );
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+ flexspi_lut [PAGE_PROGRAM ][1 ] = FLEXSPI_LUT_SEQ (
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+ kFLEXSPI_Command_WRITE_SDR , kFLEXSPI_4PAD , 0x4 ,
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+ kFLEXSPI_Command_STOP , kFLEXSPI_1PAD , 0x0 );
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+ /* Update ERASE commands for 4 byte mode */
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+ flexspi_lut [ERASE_SECTOR ][0 ] = FLEXSPI_LUT_SEQ (
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+ kFLEXSPI_Command_SDR , kFLEXSPI_1PAD , SPI_NOR_CMD_SE_4B ,
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+ kFLEXSPI_Command_RADDR_SDR , kFLEXSPI_1PAD , 32 );
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+ flexspi_lut [ERASE_BLOCK ][0 ] = FLEXSPI_LUT_SEQ (
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+ kFLEXSPI_Command_SDR , kFLEXSPI_1PAD , 0xDC ,
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+ kFLEXSPI_Command_RADDR_SDR , kFLEXSPI_1PAD , 32 ),
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+ /* Read instruction used for polling is 0x05 */
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+ data -> legacy_poll = true;
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+ flexspi_lut [READ_STATUS_REG ][0 ] = FLEXSPI_LUT_SEQ (
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+ kFLEXSPI_Command_SDR , kFLEXSPI_1PAD , SPI_NOR_CMD_RDSR ,
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+ kFLEXSPI_Command_READ_SDR , kFLEXSPI_1PAD , 0x01 );
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+ /* Device uses bit 1 of status reg 2 for QE */
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+ return flash_flexspi_nor_quad_enable (data , flexspi_lut ,
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+ JESD216_DW15_QER_VAL_S2B1v5 );
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case 0x25C2 :
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/* MX25 flash, use 4 byte read/write */
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flexspi_lut [READ ][0 ] = FLEXSPI_LUT_SEQ (
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