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1 parent f9a3c54 commit 2a72cf7Copy full SHA for 2a72cf7
dts/arm/st/n6/stm32n6.dtsi
@@ -667,6 +667,24 @@
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};
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+ sdmmc1: sdmmc@58027000 {
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+ compatible = "st,stm32-sdmmc";
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+ reg = <0x58027000 0x1000>;
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+ clocks = <&rcc STM32_CLOCK(AHB5, 8)>;
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+ resets = <&rctl STM32_RESET(AHB5, 8)>;
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+ interrupts = <174 0>;
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+ status = "disabled";
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+ };
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+
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+ sdmmc2: sdmmc@58026800 {
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+ reg = <0x58026800 0x400>;
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+ clocks = <&rcc STM32_CLOCK(AHB5, 7)>;
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+ resets = <&rctl STM32_RESET(AHB5, 7)>;
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+ interrupts = <175 0>;
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xspi1: xspi@58025000 {
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compatible = "st,stm32-xspi";
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reg = <0x58025000 0x1000>;
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