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34 | 34 | #define CLOCK_BRANCH_SYSRTCCLK 19
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35 | 35 | #define CLOCK_BRANCH_EUART0CLK 20
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36 | 36 | #define CLOCK_BRANCH_EUSART0CLK 21
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37 |
| -#define CLOCK_BRANCH_DPLLREFCLK 22 |
38 |
| -#define CLOCK_BRANCH_I2C0CLK 23 |
39 |
| -#define CLOCK_BRANCH_LCDCLK 24 |
40 |
| -#define CLOCK_BRANCH_PIXELRZCLK 25 |
41 |
| -#define CLOCK_BRANCH_PCNT0CLK 26 |
42 |
| -#define CLOCK_BRANCH_PRORTCCLK 27 |
43 |
| -#define CLOCK_BRANCH_SYSTICKCLK 28 |
44 |
| -#define CLOCK_BRANCH_LESENSEHFCLK 29 |
45 |
| -#define CLOCK_BRANCH_VDAC0CLK 30 |
46 |
| -#define CLOCK_BRANCH_VDAC1CLK 31 |
47 |
| -#define CLOCK_BRANCH_USB0CLK 32 |
48 |
| -#define CLOCK_BRANCH_FLPLLREFCLK 33 |
49 |
| -#define CLOCK_BRANCH_INVALID 34 |
| 37 | +#define CLOCK_BRANCH_EUSART1CLK 22 |
| 38 | +#define CLOCK_BRANCH_DPLLREFCLK 23 |
| 39 | +#define CLOCK_BRANCH_I2C0CLK 24 |
| 40 | +#define CLOCK_BRANCH_LCDCLK 25 |
| 41 | +#define CLOCK_BRANCH_PIXELRZCLK 26 |
| 42 | +#define CLOCK_BRANCH_PCNT0CLK 27 |
| 43 | +#define CLOCK_BRANCH_PRORTCCLK 28 |
| 44 | +#define CLOCK_BRANCH_SYSTICKCLK 29 |
| 45 | +#define CLOCK_BRANCH_LESENSEHFCLK 30 |
| 46 | +#define CLOCK_BRANCH_VDAC0CLK 31 |
| 47 | +#define CLOCK_BRANCH_VDAC1CLK 32 |
| 48 | +#define CLOCK_BRANCH_USB0CLK 33 |
| 49 | +#define CLOCK_BRANCH_FLPLLREFCLK 34 |
| 50 | +#define CLOCK_BRANCH_INVALID 35 |
50 | 51 |
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51 | 52 | #define CLOCK_BIT_MASK 0x03FUL
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52 | 53 | #define CLOCK_REG_MASK 0x1C0UL
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