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boards: silabs: Add support for SiLabs EFR32ZG23 BRD4210A board
Add support for Silicon Labs BRD4210A (a.k.a xG23-RB4210A) Radio Board. Signed-off-by: Yishai Jaffe <[email protected]>
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‎boards/silabs/radio_boards/xg23_rb4210a/Kconfig.defconfig

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# Copyright (c) 2024 Yishai Jaffe
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# SPDX-License-Identifier: Apache-2.0
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if BOARD_XG23_RB4210A
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config CMU_HFXO_FREQ
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default 39000000
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config CMU_LFXO_FREQ
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default 32768
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config LOG_BACKEND_SWO_FREQ_HZ
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default 875000
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depends on LOG_BACKEND_SWO
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if SOC_GECKO_USE_RAIL
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config FPU
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default y
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endif # SOC_GECKO_USE_RAIL
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endif # BOARD_XG23_RB4210A

‎boards/silabs/radio_boards/xg23_rb4210a/Kconfig.xg23_rb4210a

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# Copyright (c) 2024 Yishai Jaffe
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# SPDX-License-Identifier: Apache-2.0
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config BOARD_XG23_RB4210A
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select SOC_PART_NUMBER_EFR32ZG23B020F512IM48

‎boards/silabs/radio_boards/xg23_rb4210a/board.cmake

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# SPDX-License-Identifier: Apache-2.0
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board_runner_args(jlink "--device=EFR32ZG23BxxxF512")
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include(${ZEPHYR_BASE}/boards/common/jlink.board.cmake)
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board_runner_args(openocd)
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include(${ZEPHYR_BASE}/boards/common/openocd.board.cmake)
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board_runner_args(silabs_commander "--device=EFR32ZG23B020F512IM48")
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include(${ZEPHYR_BASE}/boards/common/silabs_commander.board.cmake)

‎boards/silabs/radio_boards/xg23_rb4210a/board.yml

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board:
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name: xg23_rb4210a
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full_name: EFR32xG23 868-915 MHz 20 dBm (xG23-RB4210A)
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vendor: silabs
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socs:
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- name: efr32zg23b020f512im48

‎boards/silabs/radio_boards/xg23_rb4210a/doc/efr32zg23-xg23-rb4210a.jpg

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‎boards/silabs/radio_boards/xg23_rb4210a/doc/index.rst

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.. zephyr:board:: xg23_rb4210a
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Overview
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********
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The EFR32ZG23 Radio Board is the radio board delivered with
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`xG23-PK6068A Website`_. It contains a Wireless System-On-Chip from the
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EFR32ZG23 family built on an ARM Cortex®-M33 processor with excellent low
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power capabilities.
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The BRD4210A a.k.a. xG23-RB4210A radio board plugs into the Wireless Pro Kit
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Mainboard BRD4002A and is supported as one of :ref:`silabs_radio_boards`.
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Hardware
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********
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- EFR32ZG23B020F512IM48 SoC
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- CPU core: ARM Cortex®-M33 with FPU
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- Flash memory: 512 kB
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- RAM: 64 kB
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- Transmit power: up to +20 dBm
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- Operation frequency: 868-915 MHz
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- Crystals for LFXO (32.768 kHz) and HFXO (39 MHz).
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For more information about the EFR32ZG23 SoC and BRD4210A board, refer to these
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documents:
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- `EFR32ZG23 Website`_
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- `EFR32ZG23 Datasheet`_
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- `EFR32xG23 Reference Manual`_
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- `xG23-PK6068A Website`_
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- `BRD4210A User Guide`_
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Supported Features
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==================
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The board configuration supports the following hardware features:
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+-----------+------------+-------------------------------------+
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| Interface | Controller | Driver/Component |
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+===========+============+=====================================+
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| MPU | on-chip | memory protection unit |
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+-----------+------------+-------------------------------------+
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| NVIC | on-chip | nested vector interrupt controller |
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+-----------+------------+-------------------------------------+
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| SYSTICK | on-chip | systick |
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+-----------+------------+-------------------------------------+
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| COUNTER | on-chip | stimer |
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+-----------+------------+-------------------------------------+
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| FLASH | on-chip | flash memory |
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+-----------+------------+-------------------------------------+
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| GPIO | on-chip | gpio |
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+-----------+------------+-------------------------------------+
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| UART | on-chip | serial |
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+-----------+------------+-------------------------------------+
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| I2C | on-chip | i2c |
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+-----------+------------+-------------------------------------+
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| TRNG | on-chip | semailbox |
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+-----------+------------+-------------------------------------+
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| WATCHDOG | on-chip | watchdog |
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+-----------+------------+-------------------------------------+
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Other hardware features are currently not supported by the port.
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Connections and IOs
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===================
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In the following table, the column **Name** contains Pin names. For example, PA2
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means Pin number 2 on PORTA, as used in the board's datasheets and manuals.
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+-------+-------------+-------------------------------------+
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| Name | Function | Usage |
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+=======+=============+=====================================+
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| PB2 | GPIO | LED0 |
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+-------+-------------+-------------------------------------+
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| PD3 | GPIO | LED1 |
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+-------+-------------+-------------------------------------+
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| PB1 | GPIO | Push Button 0 |
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+-------+-------------+-------------------------------------+
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| PB3 | GPIO | Push Button 1 |
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+-------+-------------+-------------------------------------+
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| PB0 | GPIO | Board Controller Enable |
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| | | VCOM_ENABLE |
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+-------+-------------+-------------------------------------+
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| PA8 | USART0_TX | UART Console VCOM_TX US0_TX |
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+-------+-------------+-------------------------------------+
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| PA9 | USART0_RX | UART Console VCOM_RX US0_RX |
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+-------+-------------+-------------------------------------+
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The default configuration can be found in
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:zephyr_file:`boards/silabs/radio_boards/xg23_rb4210a/xg23_rb4210a_defconfig`
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System Clock
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============
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The EFR32ZG23 SoC is configured to use the 39 MHz external oscillator on the
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board.
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Serial Port
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===========
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The EFR32ZG23 SoC has one USART and three EUSARTs.
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USART0 is connected to the board controller and is used for the console.
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Programming and Debugging
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*************************
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Flashing
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========
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Connect the BRD4002A board with a mounted BRD4210A radio module to your host
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computer using the USB port.
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Here is an example for the :zephyr:code-sample:`hello_world` application.
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.. zephyr-app-commands::
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:zephyr-app: samples/hello_world
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:board: xg23_rb4210a
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:goals: flash
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Open a serial terminal (minicom, putty, etc.) with the following settings:
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- Speed: 115200
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- Data: 8 bits
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- Parity: None
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- Stop bits: 1
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Reset the board and you should see the following message in the terminal:
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.. code-block:: console
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Hello World! xg23_rb4210a/efr32zg23b020f512im48
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.. _xG23-PK6068A Website:
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https://www.silabs.com/development-tools/wireless/efr32xg23-pro-kit-20-dbm
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.. _BRD4210A User Guide:
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https://www.silabs.com/documents/public/user-guides/ug507-brd4210a-user-guide.pdf
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.. _EFR32ZG23 Website:
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https://www.silabs.com/wireless/z-wave/800-series-modem-soc
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.. _EFR32ZG23 Datasheet:
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https://www.silabs.com/documents/public/data-sheets/efr32zg23-datasheet.pdf
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.. _EFR32xG23 Reference Manual:
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https://www.silabs.com/documents/public/reference-manuals/efr32xg23-rm.pdf

‎boards/silabs/radio_boards/xg23_rb4210a/pre_dt_board.cmake

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# Copyright (c) 2021 Linaro Limited
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# SPDX-License-Identifier: Apache-2.0
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# SPI is implemented via usart so node name isn't spi@...
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list(APPEND EXTRA_DTC_FLAGS "-Wno-spi_bus_bridge")

‎boards/silabs/radio_boards/xg23_rb4210a/support/openocd.cfg

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if {[info exists env(OPENOCD_INTERFACE)]} {
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set INTERFACE $env(OPENOCD_INTERFACE)
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} else {
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# By default connect over Debug USB port using the J-Link interface
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set INTERFACE "jlink"
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}
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source [find interface/$INTERFACE.cfg]
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transport select swd
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set CHIPNAME efr32
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source [find target/efm32.cfg]
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$_TARGETNAME configure -event gdb-attach {
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echo "Debugger attaching: halting execution"
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reset halt
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gdb_breakpoint_override hard
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}
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$_TARGETNAME configure -event gdb-detach {
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echo "Debugger detaching: resuming execution"
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resume
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}

‎boards/silabs/radio_boards/xg23_rb4210a/xg23_rb4210a-pinctrl.dtsi

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/*
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* Copyright (c) 2024 Yishai Jaffe
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*
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* SPDX-License-Identifier: Apache-2.0
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*/
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#include <dt-bindings/pinctrl/silabs/xg23-pinctrl.h>
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&pinctrl {
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usart0_default: usart0_default {
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group0 {
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pins = <USART0_TX_PA8>;
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drive-push-pull;
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output-high;
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};
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group1 {
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pins = <USART0_RX_PA9>;
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input-enable;
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silabs,input-filter;
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};
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};
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};

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