boards: PHYTEC: phyboard_pollux: remove mimx8mp prefix

For easier recognition PHYTEC boards have been prefixed with the SoC name.
As the new hardware model includes the SoC and cpu, this prefixing is not
needed anymore. All PHYTEC eval boards have an individual and unique name
and can be found easily via this name.

Signed-off-by: Jonas Remmert <[email protected]>

Author: Jonas Remmert

boards/deprecated.cmake

@@ -386,7 +386,7 @@ set(mimx8mp_evk_itcm_DEPRECATED
     imx8mp_evk/mimx8ml8/m7
 )
 set(mimx8mp_phyboard_pollux_DEPRECATED
-    mimx8mp_phyboard_pollux/mimx8ml8/m7
+    phyboard_pollux/mimx8ml8/m7
 )
 set(mimx8mq_evk_cm4_DEPRECATED
     imx8mq_evk/mimx8mq6/m4
@@ -910,3 +910,6 @@ set(xiao_esp32s3_DEPRECATED
 set(yd_esp32_DEPRECATED
     yd_esp32/esp32/procpu
 )
+set(mimx8mp_phyboard_pollux/mimx8ml8/m7_DEPRECATED
+    phyboard_pollux/mimx8ml8/m7
+)

boards/phytec/mimx8mp_phyboard_pollux/board.yml

@@ -1,6 +1,6 @@
 # Copyright (c) 2022 PHYTEC Messtechnik GmbH
 # SPDX-License-Identifier: Apache-2.0
 
-config BOARD_MIMX8MP_PHYBOARD_POLLUX
-	select SOC_MIMX8ML8_M7 if BOARD_MIMX8MP_PHYBOARD_POLLUX_MIMX8ML8_M7
+config BOARD_PHYBOARD_POLLUX
+	select SOC_MIMX8ML8_M7 if BOARD_PHYBOARD_POLLUX_MIMX8ML8_M7
 	select SOC_PART_NUMBER_MIMX8ML8DVNLZ

boards/phytec/mimx8mp_phyboard_pollux/Kconfig.mimx8mp_phyboard_pollux renamed to boards/phytec/phyboard_pollux/Kconfig.phyboard_pollux

@@ -0,0 +1,6 @@
+board:
+  name: phyboard_pollux
+  full_name: phyBOARD-Pollux i.MX8M Plus
+  vendor: phytec
+  socs:
+    - name: mimx8ml8

boards/phytec/mimx8mp_phyboard_pollux/board.cmake renamed to boards/phytec/phyboard_pollux/board.cmake

@@ -1,14 +1,14 @@
-.. _mimx8mp_phyboard_pollux:
+.. _phyboard_pollux:
 
-PhyBOARD Pollux (NXP i.MX8M Plus)
-#################################
+phyBOARD-Pollux i.MX8M Plus
+###########################
 
 Overview
 ********
 
-The PhyBOARD Pollux is based upon the PhyCore-i.MX8M Plus SOM which is based on
+The phyBOARD-Pollux is based upon the phyCORE-i.MX8M Plus SOM which is based on
 the NXP i.MX8M Plus SoC. The SoC includes four Coretex-A53 cores and one
-Coretex-M7 core for real time applications like Zephyr. The PhyBOARD Pollux
+Coretex-M7 core for real time applications like Zephyr. The phyBOARD-Pollux
 can be used for various applications like SmartHomes, Industry 4.0, IoT etc.
 It features a lots of interfaces and computing capacity. It can be used as
 a reference, to develop or in the final product too.
@@ -33,7 +33,7 @@ Board features:
    - MMX/SD/SDIO: microSD slot
    - Display: LVDS(1x4 or 1x8), MIPI DSI(1x4), HDMI
    - Audio: SAI
-   - Camera: 2x MIPI CSI-2 (PhyCAM-M)
+   - Camera: 2x MIPI CSI-2 (phyCAM-M)
    - Expansion Bus: I2C, SPI, SDIO, UART, USB
    - JTAG: via PEB-EVAL-01
 - LEDs:
@@ -45,14 +45,14 @@ Board features:
    :width: 720px
    :align: center
    :height: 405px
-   :alt: PhyBOARD Pollux
+   :alt: phyBOARD-Pollux
 
 More information about the board can be found at the `PHYTEC website`_.
 
 Supported Features
 ==================
 
-The Zephyr mimx8mp_phyboard_polis board configuration supports the following hardware
+The Zephyr phyboard_polis board configuration supports the following hardware
 features:
 
 +-----------+------------+------------------------------------+
@@ -74,7 +74,7 @@ features:
 +-----------+------------+------------------------------------+
 
 The default configuration can be found in the defconfig file:
-:zephyr_file:`boards/phytec/mimx8mp_phyboard_pollux/mimx8mp_phyboard_pollux_mimx8ml8_m7_defconfig`.
+:zephyr_file:`boards/phytec/phyboard_pollux/phyboard_pollux_mimx8ml8_m7_defconfig`.
 
 It's recommended to disable peripherals used by the M7-Core on the host running
 on the Linux host. Other hardware features are not currently supported with
@@ -107,7 +107,7 @@ GPIO
 
 The pinmuxing for the GPIOs is the standard pinmuxing of the mimx8mp devicetree
 created by NXP and can be found at
-:zephyr_file:`dts/arm/nxp/nxp_imx8ml_m7.dtsi`. The Pinout of the PhyBOARD Polis
+:zephyr_file:`dts/arm/nxp/nxp_imx8ml_m7.dtsi`. The Pinout of the phyBOARD-Polis
 can be found at the `PHYTEC website`_.
 
 Programming and Debugging
@@ -198,7 +198,7 @@ Connect to the console via your favorite terminal program. For example:
 Flashing and Debugging via JTAG
 ===============================
 
-The PhyBOARD-Pollux can be debugged using a JTAG or SWD debug adapter. A Segger
+The phyBOARD-Pollux can be debugged using a JTAG or SWD debug adapter. A Segger
 JLink can be connected to the compatible JTAG connector on Phytec's
 ``PEB-EVAL-01`` shield.
 
@@ -219,21 +219,21 @@ Here is an example for the :zephyr:code-sample:`hello_world` application:
 
 .. zephyr-app-commands::
    :zephyr-app: samples/hello_world
-   :board: mimx8mp_phyboard_pollux/mimx8ml8/m7
+   :board: phyboard_pollux/mimx8ml8/m7
    :goals: flash
 
 The console should now show the output of the application:
 
 .. code-block:: console
 
    *** Booting Zephyr OS build v3.7.0 ***
-   Hello World! mimx8mp_phyboard_pollux/mimx8ml8/m7
+   Hello World! phyboard_pollux/mimx8ml8/m7
 
 Starting a debug session is similar to flashing:
 
 .. zephyr-app-commands::
    :zephyr-app: samples/hello_world
-   :board: mimx8mp_phyboard_pollux/mimx8ml8/m7
+   :board: phyboard_pollux/mimx8ml8/m7
    :goals: debug
 
 Starting the M7-Core from U-Boot and Linux

boards/phytec/phyboard_pollux/board.yml

@@ -7,11 +7,11 @@
 /dts-v1/;
 
 #include <nxp/nxp_imx8ml_m7.dtsi>
-#include "mimx8mp_phyboard_pollux-pinctrl.dtsi"
+#include "phyboard_pollux-pinctrl.dtsi"
 
 / {
-	model = "PhyBOARD Pollux (i.MX8MP)";
-	compatible = "nxp,mimx8mp_phyboard_pollux";
+	model = "phyBOARD-Pollux i.MX8MP";
+	compatible = "nxp,phyboard_pollux";
 
 	chosen {
 		/* TCM */