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soc: nxp: s32ze: add support eDMA3 for S32Z270
Enable support EDMA for S32Z270. Add eDMA3 instance 0, 1, 4 and 5 for S32Z270 devices. Signed-off-by: Ha Duong Quang <[email protected]>
1 parent ba1ba25 commit 2f0a75a

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5 files changed

+136
-6
lines changed

5 files changed

+136
-6
lines changed

‎drivers/dma/Kconfig.mcux_edma‎

Lines changed: 2 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -35,10 +35,10 @@ config DMA_TCD_QUEUE_SIZE
3535

3636
config DMA_MCUX_TEST_SLOT_START
3737
int "test slot start num"
38-
depends on (SOC_SERIES_KINETIS_K6X || SOC_SERIES_KINETIS_KE1XF || SOC_SERIES_S32K3)
38+
depends on (SOC_SERIES_KINETIS_K6X || SOC_SERIES_KINETIS_KE1XF || SOC_SERIES_S32K3 || SOC_SERIES_S32ZE)
3939
default 58 if SOC_SERIES_KINETIS_K6X
4040
default 60 if SOC_SERIES_KINETIS_KE1XF
41-
default 62 if SOC_SERIES_S32K3
41+
default 62 if SOC_SERIES_S32K3 || SOC_SERIES_S32ZE
4242
help
4343
test slot start num
4444

‎drivers/dma/dma_mcux_edma.c‎

Lines changed: 3 additions & 3 deletions
Original file line numberDiff line numberDiff line change
@@ -673,9 +673,9 @@ static int dma_mcux_edma_init(const struct device *dev)
673673
LISTIFY(NUM_IRQS_WITHOUT_ERROR_IRQ(n), \
674674
DMA_MCUX_EDMA_IRQ_CONFIG, (;), n) \
675675
\
676-
IF_ENABLED(UTIL_NOT(DT_INST_NODE_HAS_PROP(n, no_error_irq)), \
677-
(IRQ_CONFIG(n, NUM_IRQS_WITHOUT_ERROR_IRQ(n), \
678-
dma_mcux_edma_error_irq_handler))) \
676+
COND_CODE_1(DT_INST_PROP(n, no_error_irq), (), \
677+
(IRQ_CONFIG(n, NUM_IRQS_WITHOUT_ERROR_IRQ(n), \
678+
dma_mcux_edma_error_irq_handler))) \
679679
\
680680
LOG_DBG("install irq done"); \
681681
}

‎dts/arm/nxp/nxp_s32z27x_r52.dtsi‎

Lines changed: 129 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -1116,5 +1116,134 @@
11161116
clock-frequency = <I2C_BITRATE_STANDARD>;
11171117
status = "disabled";
11181118
};
1119+
1120+
edma0: dma-controller@405d0000 {
1121+
compatible = "nxp,mcux-edma-v3";
1122+
reg = <0x405d0000 0x10000>, <0x405a0000 0x10000>, <0x405b0000 0x100000>;
1123+
dma-channels = <32>;
1124+
dma-requests = <64>;
1125+
dmamux-reg-offset = <3>;
1126+
#dma-cells = <2>;
1127+
nxp,mem2mem;
1128+
interrupts = <GIC_SPI 31 IRQ_TYPE_LEVEL IRQ_DEFAULT_PRIORITY>,
1129+
<GIC_SPI 32 IRQ_TYPE_LEVEL IRQ_DEFAULT_PRIORITY>,
1130+
<GIC_SPI 33 IRQ_TYPE_LEVEL IRQ_DEFAULT_PRIORITY>,
1131+
<GIC_SPI 34 IRQ_TYPE_LEVEL IRQ_DEFAULT_PRIORITY>,
1132+
<GIC_SPI 35 IRQ_TYPE_LEVEL IRQ_DEFAULT_PRIORITY>,
1133+
<GIC_SPI 36 IRQ_TYPE_LEVEL IRQ_DEFAULT_PRIORITY>,
1134+
<GIC_SPI 37 IRQ_TYPE_LEVEL IRQ_DEFAULT_PRIORITY>,
1135+
<GIC_SPI 38 IRQ_TYPE_LEVEL IRQ_DEFAULT_PRIORITY>,
1136+
<GIC_SPI 39 IRQ_TYPE_LEVEL IRQ_DEFAULT_PRIORITY>,
1137+
<GIC_SPI 40 IRQ_TYPE_LEVEL IRQ_DEFAULT_PRIORITY>,
1138+
<GIC_SPI 41 IRQ_TYPE_LEVEL IRQ_DEFAULT_PRIORITY>,
1139+
<GIC_SPI 42 IRQ_TYPE_LEVEL IRQ_DEFAULT_PRIORITY>,
1140+
<GIC_SPI 43 IRQ_TYPE_LEVEL IRQ_DEFAULT_PRIORITY>,
1141+
<GIC_SPI 44 IRQ_TYPE_LEVEL IRQ_DEFAULT_PRIORITY>,
1142+
<GIC_SPI 45 IRQ_TYPE_LEVEL IRQ_DEFAULT_PRIORITY>,
1143+
<GIC_SPI 46 IRQ_TYPE_LEVEL IRQ_DEFAULT_PRIORITY>,
1144+
<GIC_SPI 47 IRQ_TYPE_LEVEL IRQ_DEFAULT_PRIORITY>,
1145+
<GIC_SPI 48 IRQ_TYPE_LEVEL IRQ_DEFAULT_PRIORITY>,
1146+
<GIC_SPI 49 IRQ_TYPE_LEVEL IRQ_DEFAULT_PRIORITY>,
1147+
<GIC_SPI 50 IRQ_TYPE_LEVEL IRQ_DEFAULT_PRIORITY>,
1148+
<GIC_SPI 51 IRQ_TYPE_LEVEL IRQ_DEFAULT_PRIORITY>,
1149+
<GIC_SPI 52 IRQ_TYPE_LEVEL IRQ_DEFAULT_PRIORITY>,
1150+
<GIC_SPI 53 IRQ_TYPE_LEVEL IRQ_DEFAULT_PRIORITY>,
1151+
<GIC_SPI 54 IRQ_TYPE_LEVEL IRQ_DEFAULT_PRIORITY>,
1152+
<GIC_SPI 55 IRQ_TYPE_LEVEL IRQ_DEFAULT_PRIORITY>,
1153+
<GIC_SPI 56 IRQ_TYPE_LEVEL IRQ_DEFAULT_PRIORITY>,
1154+
<GIC_SPI 57 IRQ_TYPE_LEVEL IRQ_DEFAULT_PRIORITY>,
1155+
<GIC_SPI 58 IRQ_TYPE_LEVEL IRQ_DEFAULT_PRIORITY>,
1156+
<GIC_SPI 59 IRQ_TYPE_LEVEL IRQ_DEFAULT_PRIORITY>,
1157+
<GIC_SPI 60 IRQ_TYPE_LEVEL IRQ_DEFAULT_PRIORITY>,
1158+
<GIC_SPI 61 IRQ_TYPE_LEVEL IRQ_DEFAULT_PRIORITY>,
1159+
<GIC_SPI 62 IRQ_TYPE_LEVEL IRQ_DEFAULT_PRIORITY>,
1160+
<GIC_SPI 28 IRQ_TYPE_LEVEL IRQ_DEFAULT_PRIORITY>;
1161+
status = "disabled";
1162+
};
1163+
1164+
edma1: dma-controller@40dd0000 {
1165+
compatible = "nxp,mcux-edma-v3";
1166+
reg = <0x40dd0000 0x10000>, <0x40da0000 0x10000>;
1167+
dma-channels = <16>;
1168+
dma-requests = <64>;
1169+
dmamux-reg-offset = <3>;
1170+
#dma-cells = <2>;
1171+
nxp,mem2mem;
1172+
interrupts = <GIC_SPI 65 IRQ_TYPE_LEVEL IRQ_DEFAULT_PRIORITY>,
1173+
<GIC_SPI 66 IRQ_TYPE_LEVEL IRQ_DEFAULT_PRIORITY>,
1174+
<GIC_SPI 67 IRQ_TYPE_LEVEL IRQ_DEFAULT_PRIORITY>,
1175+
<GIC_SPI 68 IRQ_TYPE_LEVEL IRQ_DEFAULT_PRIORITY>,
1176+
<GIC_SPI 69 IRQ_TYPE_LEVEL IRQ_DEFAULT_PRIORITY>,
1177+
<GIC_SPI 70 IRQ_TYPE_LEVEL IRQ_DEFAULT_PRIORITY>,
1178+
<GIC_SPI 71 IRQ_TYPE_LEVEL IRQ_DEFAULT_PRIORITY>,
1179+
<GIC_SPI 72 IRQ_TYPE_LEVEL IRQ_DEFAULT_PRIORITY>,
1180+
<GIC_SPI 73 IRQ_TYPE_LEVEL IRQ_DEFAULT_PRIORITY>,
1181+
<GIC_SPI 74 IRQ_TYPE_LEVEL IRQ_DEFAULT_PRIORITY>,
1182+
<GIC_SPI 75 IRQ_TYPE_LEVEL IRQ_DEFAULT_PRIORITY>,
1183+
<GIC_SPI 76 IRQ_TYPE_LEVEL IRQ_DEFAULT_PRIORITY>,
1184+
<GIC_SPI 77 IRQ_TYPE_LEVEL IRQ_DEFAULT_PRIORITY>,
1185+
<GIC_SPI 78 IRQ_TYPE_LEVEL IRQ_DEFAULT_PRIORITY>,
1186+
<GIC_SPI 79 IRQ_TYPE_LEVEL IRQ_DEFAULT_PRIORITY>,
1187+
<GIC_SPI 80 IRQ_TYPE_LEVEL IRQ_DEFAULT_PRIORITY>,
1188+
<GIC_SPI 63 IRQ_TYPE_LEVEL IRQ_DEFAULT_PRIORITY>;
1189+
status = "disabled";
1190+
};
1191+
1192+
edma4: dma-controller@425d0000 {
1193+
compatible = "nxp,mcux-edma-v3";
1194+
reg = <0x425d0000 0x10000>, <0x425a0000 0x10000>;
1195+
dma-channels = <32>;
1196+
dma-requests = <64>;
1197+
dmamux-reg-offset = <3>;
1198+
#dma-cells = <2>;
1199+
nxp,mem2mem;
1200+
interrupts = <GIC_SPI 83 IRQ_TYPE_LEVEL IRQ_DEFAULT_PRIORITY>,
1201+
<GIC_SPI 84 IRQ_TYPE_LEVEL IRQ_DEFAULT_PRIORITY>,
1202+
<GIC_SPI 85 IRQ_TYPE_LEVEL IRQ_DEFAULT_PRIORITY>,
1203+
<GIC_SPI 86 IRQ_TYPE_LEVEL IRQ_DEFAULT_PRIORITY>,
1204+
<GIC_SPI 87 IRQ_TYPE_LEVEL IRQ_DEFAULT_PRIORITY>,
1205+
<GIC_SPI 88 IRQ_TYPE_LEVEL IRQ_DEFAULT_PRIORITY>,
1206+
<GIC_SPI 89 IRQ_TYPE_LEVEL IRQ_DEFAULT_PRIORITY>,
1207+
<GIC_SPI 90 IRQ_TYPE_LEVEL IRQ_DEFAULT_PRIORITY>,
1208+
<GIC_SPI 91 IRQ_TYPE_LEVEL IRQ_DEFAULT_PRIORITY>,
1209+
<GIC_SPI 92 IRQ_TYPE_LEVEL IRQ_DEFAULT_PRIORITY>,
1210+
<GIC_SPI 93 IRQ_TYPE_LEVEL IRQ_DEFAULT_PRIORITY>,
1211+
<GIC_SPI 94 IRQ_TYPE_LEVEL IRQ_DEFAULT_PRIORITY>,
1212+
<GIC_SPI 95 IRQ_TYPE_LEVEL IRQ_DEFAULT_PRIORITY>,
1213+
<GIC_SPI 96 IRQ_TYPE_LEVEL IRQ_DEFAULT_PRIORITY>,
1214+
<GIC_SPI 97 IRQ_TYPE_LEVEL IRQ_DEFAULT_PRIORITY>,
1215+
<GIC_SPI 98 IRQ_TYPE_LEVEL IRQ_DEFAULT_PRIORITY>,
1216+
<GIC_SPI 81 IRQ_TYPE_LEVEL IRQ_DEFAULT_PRIORITY>;
1217+
status = "disabled";
1218+
};
1219+
1220+
edma5: dma-controller@42dd0000 {
1221+
compatible = "nxp,mcux-edma-v3";
1222+
reg = <0x42dd0000 0x10000>, <0x42da0000 0x10000>;
1223+
dma-channels = <32>;
1224+
dma-requests = <64>;
1225+
dmamux-reg-offset = <3>;
1226+
#dma-cells = <2>;
1227+
nxp,mem2mem;
1228+
interrupts = <GIC_SPI 101 IRQ_TYPE_LEVEL IRQ_DEFAULT_PRIORITY>,
1229+
<GIC_SPI 102 IRQ_TYPE_LEVEL IRQ_DEFAULT_PRIORITY>,
1230+
<GIC_SPI 103 IRQ_TYPE_LEVEL IRQ_DEFAULT_PRIORITY>,
1231+
<GIC_SPI 104 IRQ_TYPE_LEVEL IRQ_DEFAULT_PRIORITY>,
1232+
<GIC_SPI 105 IRQ_TYPE_LEVEL IRQ_DEFAULT_PRIORITY>,
1233+
<GIC_SPI 106 IRQ_TYPE_LEVEL IRQ_DEFAULT_PRIORITY>,
1234+
<GIC_SPI 107 IRQ_TYPE_LEVEL IRQ_DEFAULT_PRIORITY>,
1235+
<GIC_SPI 108 IRQ_TYPE_LEVEL IRQ_DEFAULT_PRIORITY>,
1236+
<GIC_SPI 109 IRQ_TYPE_LEVEL IRQ_DEFAULT_PRIORITY>,
1237+
<GIC_SPI 110 IRQ_TYPE_LEVEL IRQ_DEFAULT_PRIORITY>,
1238+
<GIC_SPI 111 IRQ_TYPE_LEVEL IRQ_DEFAULT_PRIORITY>,
1239+
<GIC_SPI 112 IRQ_TYPE_LEVEL IRQ_DEFAULT_PRIORITY>,
1240+
<GIC_SPI 113 IRQ_TYPE_LEVEL IRQ_DEFAULT_PRIORITY>,
1241+
<GIC_SPI 114 IRQ_TYPE_LEVEL IRQ_DEFAULT_PRIORITY>,
1242+
<GIC_SPI 115 IRQ_TYPE_LEVEL IRQ_DEFAULT_PRIORITY>,
1243+
<GIC_SPI 116 IRQ_TYPE_LEVEL IRQ_DEFAULT_PRIORITY>,
1244+
<GIC_SPI 99 IRQ_TYPE_LEVEL IRQ_DEFAULT_PRIORITY>;
1245+
status = "disabled";
1246+
};
1247+
11191248
};
11201249
};

‎soc/nxp/s32/s32ze/Kconfig‎

Lines changed: 1 addition & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -19,6 +19,7 @@ config SOC_SERIES_S32ZE
1919
select HAS_MCUX_FLEXCAN
2020
select HAS_MCUX_LPI2C
2121
select SOC_EARLY_INIT_HOOK
22+
select HAS_MCUX_EDMA
2223

2324
if SOC_SERIES_S32ZE
2425

‎west.yml‎

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -198,7 +198,7 @@ manifest:
198198
groups:
199199
- hal
200200
- name: hal_nxp
201-
revision: c42b8ee2912d1b9f7c6ae1a989232a790db0f79d
201+
revision: 4597b16cfedf5553cb155151e65eb994d5d0ef25
202202
path: modules/hal/nxp
203203
groups:
204204
- hal

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