| 
 | 1 | +/*  | 
 | 2 | + * Copyright (c) 2021 Piotr Mienkowski  | 
 | 3 | + * SPDX-License-Identifier: Apache-2.0  | 
 | 4 | + */  | 
 | 5 | + | 
 | 6 | +/** @file  | 
 | 7 | + * @brief DAC driver for Atmel SAM MCU family.  | 
 | 8 | + *  | 
 | 9 | + * Remarks:  | 
 | 10 | + * Only SAME70, SAMV71 series devices are currently supported. Please submit a  | 
 | 11 | + * patch.  | 
 | 12 | + */  | 
 | 13 | + | 
 | 14 | +#define DT_DRV_COMPAT atmel_sam_dac  | 
 | 15 | + | 
 | 16 | +#include <errno.h>  | 
 | 17 | +#include <sys/__assert.h>  | 
 | 18 | +#include <soc.h>  | 
 | 19 | +#include <device.h>  | 
 | 20 | +#include <drivers/dac.h>  | 
 | 21 | + | 
 | 22 | +#include <logging/log.h>  | 
 | 23 | +LOG_MODULE_REGISTER(dac_sam, CONFIG_DAC_LOG_LEVEL);  | 
 | 24 | + | 
 | 25 | +BUILD_ASSERT(IS_ENABLED(CONFIG_SOC_SERIES_SAME70) ||  | 
 | 26 | +	     IS_ENABLED(CONFIG_SOC_SERIES_SAMV71),  | 
 | 27 | +	     "Only SAME70, SAMV71 series devices are currently supported.");  | 
 | 28 | + | 
 | 29 | +#define DAC_CHANNEL_NO  2  | 
 | 30 | + | 
 | 31 | +/* Device constant configuration parameters */  | 
 | 32 | +struct dac_sam_dev_cfg {  | 
 | 33 | +	Dacc *regs;  | 
 | 34 | +	void (*irq_config)(void);  | 
 | 35 | +	uint8_t irq_id;  | 
 | 36 | +	uint8_t periph_id;  | 
 | 37 | +	uint8_t prescaler;  | 
 | 38 | +};  | 
 | 39 | + | 
 | 40 | +struct dac_channel {  | 
 | 41 | +	struct k_sem sem;  | 
 | 42 | +};  | 
 | 43 | + | 
 | 44 | +/* Device run time data */  | 
 | 45 | +struct dac_sam_dev_data {  | 
 | 46 | +	struct dac_channel dac_channels[DAC_CHANNEL_NO];  | 
 | 47 | +};  | 
 | 48 | + | 
 | 49 | +#define DEV_NAME(dev) ((dev)->name)  | 
 | 50 | +#define DEV_CFG(dev) \  | 
 | 51 | +	((const struct dac_sam_dev_cfg *const)(dev)->config)  | 
 | 52 | +#define DEV_DATA(dev) \  | 
 | 53 | +	((struct dac_sam_dev_data *const)(dev)->data)  | 
 | 54 | + | 
 | 55 | +static void dac_sam_isr(void *arg)  | 
 | 56 | +{  | 
 | 57 | +	const struct device *dev = (const struct device *)arg;  | 
 | 58 | +	const struct dac_sam_dev_cfg *const dev_cfg = DEV_CFG(dev);  | 
 | 59 | +	struct dac_sam_dev_data *const dev_data = DEV_DATA(dev);  | 
 | 60 | +	Dacc *const dac = dev_cfg->regs;  | 
 | 61 | +	uint32_t int_stat;  | 
 | 62 | + | 
 | 63 | +	/* Retrieve interrupt status */  | 
 | 64 | +	int_stat = dac->DACC_ISR & dac->DACC_IMR;  | 
 | 65 | + | 
 | 66 | +	if ((int_stat & DACC_ISR_TXRDY0) != 0) {  | 
 | 67 | +		/* Disable Transmit Ready Interrupt */  | 
 | 68 | +		dac->DACC_IDR = DACC_IDR_TXRDY0;  | 
 | 69 | +		k_sem_give(&dev_data->dac_channels[0].sem);  | 
 | 70 | +	}  | 
 | 71 | +	if ((int_stat & DACC_ISR_TXRDY1) != 0) {  | 
 | 72 | +		/* Disable Transmit Ready Interrupt */  | 
 | 73 | +		dac->DACC_IDR = DACC_IDR_TXRDY1;  | 
 | 74 | +		k_sem_give(&dev_data->dac_channels[1].sem);  | 
 | 75 | +	}  | 
 | 76 | +}  | 
 | 77 | + | 
 | 78 | +static int dac_sam_channel_setup(const struct device *dev,  | 
 | 79 | +				 const struct dac_channel_cfg *channel_cfg)  | 
 | 80 | +{  | 
 | 81 | +	const struct dac_sam_dev_cfg *const dev_cfg = DEV_CFG(dev);  | 
 | 82 | +	Dacc *const dac = dev_cfg->regs;  | 
 | 83 | + | 
 | 84 | +	if (channel_cfg->channel_id >= DAC_CHANNEL_NO) {  | 
 | 85 | +		return -EINVAL;  | 
 | 86 | +	}  | 
 | 87 | +	if (channel_cfg->resolution != 12) {  | 
 | 88 | +		return -ENOTSUP;  | 
 | 89 | +	}  | 
 | 90 | + | 
 | 91 | +	/* Enable Channel */  | 
 | 92 | +	dac->DACC_CHER = DACC_CHER_CH0 << channel_cfg->channel_id;  | 
 | 93 | + | 
 | 94 | +	return 0;  | 
 | 95 | +}  | 
 | 96 | + | 
 | 97 | +static int dac_sam_write_value(const struct device *dev, uint8_t channel,  | 
 | 98 | +			       uint32_t value)  | 
 | 99 | +{  | 
 | 100 | +	struct dac_sam_dev_data *const dev_data = DEV_DATA(dev);  | 
 | 101 | +	const struct dac_sam_dev_cfg *const dev_cfg = DEV_CFG(dev);  | 
 | 102 | +	Dacc *const dac = dev_cfg->regs;  | 
 | 103 | + | 
 | 104 | +	if (channel >= DAC_CHANNEL_NO) {  | 
 | 105 | +		return -EINVAL;  | 
 | 106 | +	}  | 
 | 107 | + | 
 | 108 | +	if (dac->DACC_IMR & (DACC_IMR_TXRDY0 << channel)) {  | 
 | 109 | +		/* Attempting to send data on channel that's already in use */  | 
 | 110 | +		return -EINVAL;  | 
 | 111 | +	}  | 
 | 112 | + | 
 | 113 | +	k_sem_take(&dev_data->dac_channels[channel].sem, K_FOREVER);  | 
 | 114 | + | 
 | 115 | +	/* Trigger conversion */  | 
 | 116 | +	dac->DACC_CDR[channel] = DACC_CDR_DATA0(value);  | 
 | 117 | + | 
 | 118 | +	/* Enable Transmit Ready Interrupt */  | 
 | 119 | +	dac->DACC_IER = DACC_IER_TXRDY0 << channel;  | 
 | 120 | + | 
 | 121 | +	return 0;  | 
 | 122 | +}  | 
 | 123 | + | 
 | 124 | +static int dac_sam_init(const struct device *dev)  | 
 | 125 | +{  | 
 | 126 | +	const struct dac_sam_dev_cfg *const dev_cfg = DEV_CFG(dev);  | 
 | 127 | +	struct dac_sam_dev_data *const dev_data = DEV_DATA(dev);  | 
 | 128 | +	Dacc *const dac = dev_cfg->regs;  | 
 | 129 | + | 
 | 130 | +	/* Configure interrupts */  | 
 | 131 | +	dev_cfg->irq_config();  | 
 | 132 | + | 
 | 133 | +	/* Initialize semaphores */  | 
 | 134 | +	for (int i = 0; i < ARRAY_SIZE(dev_data->dac_channels); i++) {  | 
 | 135 | +		k_sem_init(&dev_data->dac_channels[i].sem, 1, 1);  | 
 | 136 | +	}  | 
 | 137 | + | 
 | 138 | +	/* Enable DAC clock in PMC */  | 
 | 139 | +	soc_pmc_peripheral_enable(dev_cfg->periph_id);  | 
 | 140 | + | 
 | 141 | +	/* Set Mode Register */  | 
 | 142 | +	dac->DACC_MR = DACC_MR_PRESCALER(dev_cfg->prescaler);  | 
 | 143 | + | 
 | 144 | +	/* Enable module's IRQ */  | 
 | 145 | +	irq_enable(dev_cfg->irq_id);  | 
 | 146 | + | 
 | 147 | +	LOG_INF("Device %s initialized", DEV_NAME(dev));  | 
 | 148 | + | 
 | 149 | +	return 0;  | 
 | 150 | +}  | 
 | 151 | + | 
 | 152 | +static const struct dac_driver_api dac_sam_driver_api = {  | 
 | 153 | +	.channel_setup = dac_sam_channel_setup,  | 
 | 154 | +	.write_value = dac_sam_write_value,  | 
 | 155 | +};  | 
 | 156 | + | 
 | 157 | +/* DACC */  | 
 | 158 | + | 
 | 159 | +static void dacc_irq_config(void)  | 
 | 160 | +{  | 
 | 161 | +	IRQ_CONNECT(DT_INST_IRQN(0), DT_INST_IRQ(0, priority), dac_sam_isr,  | 
 | 162 | +		    DEVICE_DT_INST_GET(0), 0);  | 
 | 163 | +}  | 
 | 164 | + | 
 | 165 | +static const struct dac_sam_dev_cfg dacc_sam_config = {  | 
 | 166 | +	.regs = (Dacc *)DT_INST_REG_ADDR(0),  | 
 | 167 | +	.irq_id = DT_INST_IRQN(0),  | 
 | 168 | +	.irq_config = dacc_irq_config,  | 
 | 169 | +	.periph_id = DT_INST_PROP(0, peripheral_id),  | 
 | 170 | +	.prescaler = DT_INST_PROP(0, prescaler),  | 
 | 171 | +};  | 
 | 172 | + | 
 | 173 | +static struct dac_sam_dev_data dacc_sam_data;  | 
 | 174 | + | 
 | 175 | +DEVICE_DT_INST_DEFINE(0, dac_sam_init, NULL, &dacc_sam_data, &dacc_sam_config,  | 
 | 176 | +		      POST_KERNEL, CONFIG_KERNEL_INIT_PRIORITY_DEVICE,  | 
 | 177 | +		      &dac_sam_driver_api);  | 
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