soc: imx_rt: added support for nxp imx_usdhc SDHC driver to RT600/500

added support for NXP iMX RT600/RT500 to use to SDHC driver, with SD
subsystem. Tested with RT685 EVK

Signed-off-by: Daniel DeGrasse <[email protected]>

Author: danieldegrasse

boards/arm/mimxrt685_evk/mimxrt685_evk_cm33.dts

@@ -392,6 +392,12 @@ i2s1: &flexcomm3 {
 	/* Quick fix for 1.8V SD cards on RT600- disable 1.8V negotiation */
 	no-1-8-v;
 	pwr-gpios = <&gpio2 10 GPIO_ACTIVE_HIGH>;
+	cd-gpios = <&gpio2 9 GPIO_ACTIVE_LOW>;
+	mmc {
+		compatible = "zephyr,sdmmc-disk";
+		status = "okay";
+		label = "SDMMC_0";
+	};
 };
 
 &lpadc0 {

boards/arm/mimxrt685_evk/pinmux.c

@@ -770,7 +770,7 @@ static int mimxrt685_evk_pinmux_init(const struct device *dev)
 
 #endif
 
-#if DT_NODE_HAS_STATUS(DT_NODELABEL(usdhc1), okay) && CONFIG_DISK_DRIVER_SDMMC
+#if DT_NODE_HAS_STATUS(DT_NODELABEL(usdhc1), okay) && CONFIG_IMX_USDHC
 	uint32_t port1_pin30_config = (/* Pin is configured as SD0_CLK */
 		IOPCTL_PIO_FUNC1 |
 		/* Disable pull-up / pull-down function */

dts/arm/nxp/nxp_rt5xx_common.dtsi

@@ -369,21 +369,29 @@
 	};
 
 	usdhc1: usdhc@136000 {
-		compatible = "nxp,imx-usdhc";
+		compatible = "nxp,imx-sdhc";
 		reg = <0x136000 0x1000>;
 		status = "disabled";
 		interrupts = <45 0>;
 		clocks = <&clkctl1 MCUX_USDHC1_CLK>;
-		label = "USDHC_1";
+		label = "SDHC_0";
+		max-current-330 = <1020>;
+		max-current-180 = <1020>;
+		max-bus-freq = <208000000>;
+		min-bus-freq = <400000>;
 	};
 
 	usdhc2: usdhc@137000 {
-		compatible = "nxp,imx-usdhc";
+		compatible = "nxp,imx-sdhc";
 		reg = <0x137000 0x1000>;
 		status = "disabled";
 		interrupts = <46 0>;
 		clocks = <&clkctl1 MCUX_USDHC2_CLK>;
-		label = "USDHC_2";
+		label = "SDHC_1";
+		max-current-330 = <1020>;
+		max-current-180 = <1020>;
+		max-bus-freq = <208000000>;
+		min-bus-freq = <400000>;
 	};
 
 	lpadc0: lpadc@13A0000 {

dts/arm/nxp/nxp_rt6xx_common.dtsi

@@ -321,21 +321,29 @@
 	};
 
 	usdhc1: usdhc@136000 {
-		compatible = "nxp,imx-usdhc";
+		compatible = "nxp,imx-sdhc";
 		reg = <0x136000 0x1000>;
 		status = "disabled";
 		interrupts = <45 0>;
 		clocks = <&clkctl1 MCUX_USDHC1_CLK>;
-		label = "USDHC_1";
+		label = "SDHC_0";
+		max-current-330 = <1020>;
+		max-current-180 = <1020>;
+		max-bus-freq = <208000000>;
+		min-bus-freq = <400000>;
 	};
 
 	usdhc2: usdhc@137000 {
-		compatible = "nxp,imx-usdhc";
+		compatible = "nxp,imx-sdhc";
 		reg = <0x137000 0x1000>;
 		status = "disabled";
 		interrupts = <46 0>;
 		clocks = <&clkctl1 MCUX_USDHC2_CLK>;
-		label = "USDHC_2";
+		label = "SDHC_1";
+		max-current-330 = <1020>;
+		max-current-180 = <1020>;
+		max-bus-freq = <208000000>;
+		min-bus-freq = <400000>;
 	};
 
 	lpadc0: lpadc@13A0000 {

soc/arm/nxp_imx/rt6xx/Kconfig.defconfig.mimxrt685_cm33

@@ -41,6 +41,10 @@ config CLOCK_CONTROL_MCUX_SYSCON
 	default y if HAS_MCUX_SYSCON
 	depends on CLOCK_CONTROL
 
+config IMX_USDHC
+	default y if (HAS_MCUX_USDHC1 || HAS_MCUX_USDHC2)
+	depends on SDHC
+
 if MCUX_OS_TIMER
 
 config SYS_CLOCK_HW_CYCLES_PER_SEC

soc/arm/nxp_imx/rt6xx/soc.c

@@ -263,7 +263,7 @@ static ALWAYS_INLINE void clock_init(void)
 	CLOCK_AttachClk(kNONE_to_WDT0_CLK);
 #endif
 
-#if DT_NODE_HAS_STATUS(DT_NODELABEL(usdhc1), okay) && CONFIG_DISK_DRIVER_SDMMC
+#if DT_NODE_HAS_STATUS(DT_NODELABEL(usdhc1), okay) && CONFIG_IMX_USDHC
 	/* Make sure USDHC ram buffer has been power up*/
 	POWER_DisablePD(kPDRUNCFG_APD_USDHC0_SRAM);
 	POWER_DisablePD(kPDRUNCFG_PPD_USDHC0_SRAM);
@@ -283,7 +283,7 @@ static ALWAYS_INLINE void clock_init(void)
 #endif /* CONFIG_SOC_MIMXRT685S_CM33 */
 }
 
-#if (DT_NODE_HAS_STATUS(DT_NODELABEL(usdhc1), okay) && CONFIG_DISK_DRIVER_SDMMC)
+#if (DT_NODE_HAS_STATUS(DT_NODELABEL(usdhc1), okay) && CONFIG_IMX_USDHC)
 
 void imxrt_usdhc_pinmux(uint16_t nusdhc, bool init,
 	uint32_t speed, uint32_t strength)

soc/arm/nxp_imx/rt6xx/soc.h

@@ -79,7 +79,7 @@
 extern "C" {
 #endif
 
-#if CONFIG_DISK_DRIVER_SDMMC &&					\
+#if CONFIG_IMX_USDHC &&					\
 	(DT_NODE_HAS_STATUS(DT_NODELABEL(usdhc1), okay) ||	\
 	 DT_NODE_HAS_STATUS(DT_NODELABEL(usdhc2), okay))