arch: arm64: Re-init HCR_EL2 in z_arm64_el2_init

HCR_EL2 is configured to certain value by some
loaders such as Uboot on some arm64 boards(such as roc_rk3568_pc),
When HCR_EL2.TGE, HCR_EL2.AMO and HCR_EL2.IMO bits are
set to 1, some unpredictable behaviors may occur during
zephyr boot. So we clear these bits to avoid it.

Signed-off-by: Charlie Xiong <[email protected]>

Author: cocoeoli

arch/arm64/core/reset.c

@@ -125,6 +125,12 @@ void z_arm64_el2_init(void)
 	write_sctlr_el2(reg);
 
 	reg = read_hcr_el2();
+	/* when EL2 is enable in current security status:
+	 * Clear TGE bit: All exceptions that would not be routed to EL2;
+	 * Clear AMO bit: Physical SError interrupts are not taken to EL2 and EL3.
+	 * Clear IMO bit: Physical IRQ interrupts are not taken to EL2 and EL3.
+	 */
+	reg &= ~(HCR_IMO_BIT | HCR_AMO_BIT | HCR_TGE_BIT);
 	reg |= HCR_RW_BIT;		/* EL1 Execution state is AArch64 */
 	write_hcr_el2(reg);
 

include/zephyr/arch/arm64/cpu.h

@@ -137,6 +137,7 @@
 #define HCR_FMO_BIT		BIT(3)
 #define HCR_IMO_BIT		BIT(4)
 #define HCR_AMO_BIT		BIT(5)
+#define HCR_TGE_BIT		BIT(27)
 #define HCR_RW_BIT		BIT(31)
 
 /* System register interface to GICv3 */