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soc: st: common: Rename STM32_PWR_WKUP_PIN_SRC_x
This renames the STM32_PWR_WKUP_PIN_SRC_x symbols to better match their meaning. It also adds a new symbol (STM32_PWR_WKUP_PIN_NOT_MUXED) for SoCs without wake-up mux support. Signed-off-by: Tomáš Juřena <[email protected]>
1 parent 1e5cc37 commit 315ea56

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9 files changed

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-55
lines changed

9 files changed

+56
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lines changed

‎dts/arm/st/c0/stm32c0.dtsi‎

Lines changed: 6 additions & 6 deletions
Original file line numberDiff line numberDiff line change
@@ -11,13 +11,13 @@
1111
*
1212
* &pwr {
1313
* wkup-pin@2 {
14-
* wkup-gpios = <&gpioX YY STM32_PWR_WKUP_PIN_SRC_0>;
14+
* wkup-gpios = <&gpioX YY STM32_PWR_WKUP_PIN_NOT_MUXED>;
1515
* };
1616
* wkup-pin@5 {
17-
* wkup-gpios = <&gpioX YY STM32_PWR_WKUP_PIN_SRC_0>;
17+
* wkup-gpios = <&gpioX YY STM32_PWR_WKUP_PIN_NOT_MUXED>;
1818
* };
1919
* wkup-pin@6 {
20-
* wkup-gpios = <&gpioX YY STM32_PWR_WKUP_PIN_SRC_0>;
20+
* wkup-gpios = <&gpioX YY STM32_PWR_WKUP_PIN_NOT_MUXED>;
2121
* };
2222
* };
2323
*
@@ -229,7 +229,7 @@
229229

230230
wkup-pin@1 {
231231
reg = <0x1>;
232-
wkup-gpios = <&gpioa 0 STM32_PWR_WKUP_PIN_SRC_0>;
232+
wkup-gpios = <&gpioa 0 STM32_PWR_WKUP_PIN_NOT_MUXED>;
233233
};
234234

235235
wkup-pin@2 {
@@ -238,12 +238,12 @@
238238

239239
wkup-pin@3 {
240240
reg = <0x3>;
241-
wkup-gpios = <&gpiob 6 STM32_PWR_WKUP_PIN_SRC_0>;
241+
wkup-gpios = <&gpiob 6 STM32_PWR_WKUP_PIN_NOT_MUXED>;
242242
};
243243

244244
wkup-pin@4 {
245245
reg = <0x4>;
246-
wkup-gpios = <&gpioa 2 STM32_PWR_WKUP_PIN_SRC_0>;
246+
wkup-gpios = <&gpioa 2 STM32_PWR_WKUP_PIN_NOT_MUXED>;
247247
};
248248

249249
wkup-pin@5 {

‎dts/arm/st/l4/stm32l4r5Xi.dtsi‎

Lines changed: 5 additions & 5 deletions
Original file line numberDiff line numberDiff line change
@@ -20,22 +20,22 @@
2020

2121
&pwr {
2222
wkup-pin@1 {
23-
wkup-gpios = <&gpioa 0 STM32_PWR_WKUP_PIN_SRC_0>;
23+
wkup-gpios = <&gpioa 0 STM32_PWR_WKUP_PIN_NOT_MUXED>;
2424
};
2525

2626
wkup-pin@2 {
27-
wkup-gpios = <&gpioc 13 STM32_PWR_WKUP_PIN_SRC_0>;
27+
wkup-gpios = <&gpioc 13 STM32_PWR_WKUP_PIN_NOT_MUXED>;
2828
};
2929

3030
wkup-pin@3 {
31-
wkup-gpios = <&gpioe 6 STM32_PWR_WKUP_PIN_SRC_0>;
31+
wkup-gpios = <&gpioe 6 STM32_PWR_WKUP_PIN_NOT_MUXED>;
3232
};
3333

3434
wkup-pin@4 {
35-
wkup-gpios = <&gpioa 2 STM32_PWR_WKUP_PIN_SRC_0>;
35+
wkup-gpios = <&gpioa 2 STM32_PWR_WKUP_PIN_NOT_MUXED>;
3636
};
3737

3838
wkup-pin@5 {
39-
wkup-gpios = <&gpioc 5 STM32_PWR_WKUP_PIN_SRC_0>;
39+
wkup-gpios = <&gpioc 5 STM32_PWR_WKUP_PIN_NOT_MUXED>;
4040
};
4141
};

‎dts/arm/st/u5/stm32u5.dtsi‎

Lines changed: 24 additions & 24 deletions
Original file line numberDiff line numberDiff line change
@@ -876,58 +876,58 @@
876876

877877
wkup-pin@1 {
878878
reg = <0x1>;
879-
wkup-gpios = <&gpioa 0 STM32_PWR_WKUP_PIN_SRC_0>,
880-
<&gpiob 2 STM32_PWR_WKUP_PIN_SRC_1>,
881-
<&gpioe 4 STM32_PWR_WKUP_PIN_SRC_2>;
879+
wkup-gpios = <&gpioa 0 STM32_PWR_WKUP_EVT_SRC_0>,
880+
<&gpiob 2 STM32_PWR_WKUP_EVT_SRC_1>,
881+
<&gpioe 4 STM32_PWR_WKUP_EVT_SRC_2>;
882882
};
883883

884884
wkup-pin@2 {
885885
reg = <0x2>;
886-
wkup-gpios = <&gpioa 4 STM32_PWR_WKUP_PIN_SRC_0>,
887-
<&gpioc 13 STM32_PWR_WKUP_PIN_SRC_1>,
888-
<&gpioe 5 STM32_PWR_WKUP_PIN_SRC_2>;
886+
wkup-gpios = <&gpioa 4 STM32_PWR_WKUP_EVT_SRC_0>,
887+
<&gpioc 13 STM32_PWR_WKUP_EVT_SRC_1>,
888+
<&gpioe 5 STM32_PWR_WKUP_EVT_SRC_2>;
889889
};
890890

891891
wkup-pin@3 {
892892
reg = <0x3>;
893-
wkup-gpios = <&gpioe 6 STM32_PWR_WKUP_PIN_SRC_0>,
894-
<&gpioa 1 STM32_PWR_WKUP_PIN_SRC_1>,
895-
<&gpiob 6 STM32_PWR_WKUP_PIN_SRC_2>;
893+
wkup-gpios = <&gpioe 6 STM32_PWR_WKUP_EVT_SRC_0>,
894+
<&gpioa 1 STM32_PWR_WKUP_EVT_SRC_1>,
895+
<&gpiob 6 STM32_PWR_WKUP_EVT_SRC_2>;
896896
};
897897

898898
wkup-pin@4 {
899899
reg = <0x4>;
900-
wkup-gpios = <&gpioa 2 STM32_PWR_WKUP_PIN_SRC_0>,
901-
<&gpiob 1 STM32_PWR_WKUP_PIN_SRC_1>,
902-
<&gpiob 7 STM32_PWR_WKUP_PIN_SRC_2>;
900+
wkup-gpios = <&gpioa 2 STM32_PWR_WKUP_EVT_SRC_0>,
901+
<&gpiob 1 STM32_PWR_WKUP_EVT_SRC_1>,
902+
<&gpiob 7 STM32_PWR_WKUP_EVT_SRC_2>;
903903
};
904904

905905
wkup-pin@5 {
906906
reg = <0x5>;
907-
wkup-gpios = <&gpioc 5 STM32_PWR_WKUP_PIN_SRC_0>,
908-
<&gpioa 3 STM32_PWR_WKUP_PIN_SRC_1>,
909-
<&gpiob 8 STM32_PWR_WKUP_PIN_SRC_2>;
907+
wkup-gpios = <&gpioc 5 STM32_PWR_WKUP_EVT_SRC_0>,
908+
<&gpioa 3 STM32_PWR_WKUP_EVT_SRC_1>,
909+
<&gpiob 8 STM32_PWR_WKUP_EVT_SRC_2>;
910910
};
911911

912912
wkup-pin@6 {
913913
reg = <0x6>;
914-
wkup-gpios = <&gpiob 5 STM32_PWR_WKUP_PIN_SRC_0>,
915-
<&gpioa 5 STM32_PWR_WKUP_PIN_SRC_1>,
916-
<&gpioe 7 STM32_PWR_WKUP_PIN_SRC_2>;
914+
wkup-gpios = <&gpiob 5 STM32_PWR_WKUP_EVT_SRC_0>,
915+
<&gpioa 5 STM32_PWR_WKUP_EVT_SRC_1>,
916+
<&gpioe 7 STM32_PWR_WKUP_EVT_SRC_2>;
917917
};
918918

919919
wkup-pin@7 {
920920
reg = <0x7>;
921-
wkup-gpios = <&gpiob 15 STM32_PWR_WKUP_PIN_SRC_0>,
922-
<&gpioa 6 STM32_PWR_WKUP_PIN_SRC_1>,
923-
<&gpioe 8 STM32_PWR_WKUP_PIN_SRC_2>;
921+
wkup-gpios = <&gpiob 15 STM32_PWR_WKUP_EVT_SRC_0>,
922+
<&gpioa 6 STM32_PWR_WKUP_EVT_SRC_1>,
923+
<&gpioe 8 STM32_PWR_WKUP_EVT_SRC_2>;
924924
};
925925

926926
wkup-pin@8 {
927927
reg = <0x8>;
928-
wkup-gpios = <&gpiof 2 STM32_PWR_WKUP_PIN_SRC_0>,
929-
<&gpioa 7 STM32_PWR_WKUP_PIN_SRC_1>,
930-
<&gpiob 10 STM32_PWR_WKUP_PIN_SRC_2>;
928+
wkup-gpios = <&gpiof 2 STM32_PWR_WKUP_EVT_SRC_0>,
929+
<&gpioa 7 STM32_PWR_WKUP_EVT_SRC_1>,
930+
<&gpiob 10 STM32_PWR_WKUP_EVT_SRC_2>;
931931
};
932932
};
933933

‎dts/arm/st/wb/stm32wb.dtsi‎

Lines changed: 2 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -535,12 +535,12 @@
535535

536536
wkup-pin@1 {
537537
reg = <0x1>;
538-
wkup-gpios = <&gpioa 0 STM32_PWR_WKUP_PIN_SRC_0>;
538+
wkup-gpios = <&gpioa 0 STM32_PWR_WKUP_PIN_NOT_MUXED>;
539539
};
540540

541541
wkup-pin@4 {
542542
reg = <0x4>;
543-
wkup-gpios = <&gpioa 2 STM32_PWR_WKUP_PIN_SRC_0>;
543+
wkup-gpios = <&gpioa 2 STM32_PWR_WKUP_PIN_NOT_MUXED>;
544544
};
545545
};
546546
};

‎dts/arm/st/wb/stm32wb55Xg.dtsi‎

Lines changed: 3 additions & 3 deletions
Original file line numberDiff line numberDiff line change
@@ -24,16 +24,16 @@
2424
&pwr {
2525
wkup-pin@2 {
2626
reg = <0x2>;
27-
wkup-gpios = <&gpioc 13 STM32_PWR_WKUP_PIN_SRC_0>;
27+
wkup-gpios = <&gpioc 13 STM32_PWR_WKUP_PIN_NOT_MUXED>;
2828
};
2929

3030
wkup-pin@3 {
3131
reg = <0x3>;
32-
wkup-gpios = <&gpioc 12 STM32_PWR_WKUP_PIN_SRC_0>;
32+
wkup-gpios = <&gpioc 12 STM32_PWR_WKUP_PIN_NOT_MUXED>;
3333
};
3434

3535
wkup-pin@5 {
3636
reg = <0x5>;
37-
wkup-gpios = <&gpioc 5 STM32_PWR_WKUP_PIN_SRC_0>;
37+
wkup-gpios = <&gpioc 5 STM32_PWR_WKUP_PIN_NOT_MUXED>;
3838
};
3939
};

‎dts/arm/st/wl/stm32wl.dtsi‎

Lines changed: 3 additions & 3 deletions
Original file line numberDiff line numberDiff line change
@@ -523,17 +523,17 @@
523523

524524
wkup-pin@1 {
525525
reg = <0x1>;
526-
wkup-gpios = <&gpioa 0 STM32_PWR_WKUP_PIN_SRC_0>;
526+
wkup-gpios = <&gpioa 0 STM32_PWR_WKUP_PIN_NOT_MUXED>;
527527
};
528528

529529
wkup-pin@2 {
530530
reg = <0x2>;
531-
wkup-gpios = <&gpioc 13 STM32_PWR_WKUP_PIN_SRC_0>;
531+
wkup-gpios = <&gpioc 13 STM32_PWR_WKUP_PIN_NOT_MUXED>;
532532
};
533533

534534
wkup-pin@3 {
535535
reg = <0x3>;
536-
wkup-gpios = <&gpiob 3 STM32_PWR_WKUP_PIN_SRC_0>;
536+
wkup-gpios = <&gpiob 3 STM32_PWR_WKUP_PIN_NOT_MUXED>;
537537
};
538538
};
539539
};

‎dts/bindings/power/st,stm32-pwr.yaml‎

Lines changed: 3 additions & 3 deletions
Original file line numberDiff line numberDiff line change
@@ -62,6 +62,6 @@ child-binding:
6262
description: |
6363
Specifies the GPIOs, if any, that are associated with the wake-up pin.
6464
65-
For example, for GPIO B2 associated with wakeup source 1 on wake-up
66-
pin 1 on STM32U5 SoCs:
67-
wkup-gpios = <&gpiob 2 STM32_PWR_WKUP_PIN_SRC_1>, <...>;
65+
For example, for GPIO PB2 associated with wakeup source 1 on wake-up
66+
event 1 on STM32U5 SoCs:
67+
wkup-gpios = <&gpiob 2 STM32_PWR_WKUP_EVT_SRC_1>, <...>;

‎include/zephyr/dt-bindings/power/stm32_pwr.h‎

Lines changed: 4 additions & 3 deletions
Original file line numberDiff line numberDiff line change
@@ -17,9 +17,10 @@
1717
* @{
1818
*/
1919

20-
#define STM32_PWR_WKUP_PIN_SRC_0 0
21-
#define STM32_PWR_WKUP_PIN_SRC_1 1
22-
#define STM32_PWR_WKUP_PIN_SRC_2 (1 << 2)
20+
#define STM32_PWR_WKUP_PIN_NOT_MUXED STM32_PWR_WKUP_EVT_SRC_0
21+
#define STM32_PWR_WKUP_EVT_SRC_0 0
22+
#define STM32_PWR_WKUP_EVT_SRC_1 1
23+
#define STM32_PWR_WKUP_EVT_SRC_2 (1 << 2)
2324

2425
/** @} */
2526

‎soc/st/stm32/common/stm32_wkup_pins.c‎

Lines changed: 6 additions & 6 deletions
Original file line numberDiff line numberDiff line change
@@ -225,11 +225,11 @@ static void wkup_pin_setup(const struct wkup_pin_cfg_t *wakeup_pin_cfg)
225225

226226
#if defined(CONFIG_SOC_SERIES_STM32U5X) || defined(CONFIG_SOC_SERIES_STM32WBAX)
227227
/* Select the proper wake-up signal source */
228-
if (wakeup_pin_cfg->src_selection & STM32_PWR_WKUP_PIN_SRC_0) {
228+
if (wakeup_pin_cfg->src_selection & STM32_PWR_WKUP_EVT_SRC_0) {
229229
LL_PWR_SetWakeUpPinSignal0Selection(table_wakeup_pins[wkup_pin_index]);
230-
} else if (wakeup_pin_cfg->src_selection & STM32_PWR_WKUP_PIN_SRC_1) {
230+
} else if (wakeup_pin_cfg->src_selection & STM32_PWR_WKUP_EVT_SRC_1) {
231231
LL_PWR_SetWakeUpPinSignal1Selection(table_wakeup_pins[wkup_pin_index]);
232-
} else if (wakeup_pin_cfg->src_selection & STM32_PWR_WKUP_PIN_SRC_2) {
232+
} else if (wakeup_pin_cfg->src_selection & STM32_PWR_WKUP_EVT_SRC_2) {
233233
LL_PWR_SetWakeUpPinSignal2Selection(table_wakeup_pins[wkup_pin_index]);
234234
} else {
235235
LL_PWR_SetWakeUpPinSignal3Selection(table_wakeup_pins[wkup_pin_index]);
@@ -286,9 +286,9 @@ int stm32_pwr_wkup_pin_cfg_gpio(const struct gpio_dt_spec *gpio)
286286
/* Each wake-up pin on STM32U5 is associated with 4 wkup srcs, 3 of them correspond to GPIOs. */
287287
#if defined(CONFIG_SOC_SERIES_STM32U5X) || defined(CONFIG_SOC_SERIES_STM32WBAX)
288288
wakeup_pin_cfg.src_selection = wkup_pin_gpio_cfg->dt_flags &
289-
(STM32_PWR_WKUP_PIN_SRC_0 |
290-
STM32_PWR_WKUP_PIN_SRC_1 |
291-
STM32_PWR_WKUP_PIN_SRC_2);
289+
(STM32_PWR_WKUP_EVT_SRC_0 |
290+
STM32_PWR_WKUP_EVT_SRC_1 |
291+
STM32_PWR_WKUP_EVT_SRC_2);
292292
#else
293293
wakeup_pin_cfg.src_selection = 0;
294294
#endif /* CONFIG_SOC_SERIES_STM32U5X or CONFIG_SOC_SERIES_STM32WBAX */

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