Skip to content

Commit 316ff5b

Browse files
committed
arm: cortex_a_r linker: move data section between rodata and bss
By moving data section between rodata and bss, and disabling Kconfig LINKER_LAST_SECTION_ID by default if non-XIP (it is seems only needed for XIP), the size of zephyr.bin can be reduced significantly on non-XIP system. As a result, moving __kernel_ram_start to another place to ensure it still include bss + data as before. Signed-off-by: Dat Nguyen Duy <[email protected]>
1 parent 4e4ec9c commit 316ff5b

File tree

1 file changed

+41
-39
lines changed
  • include/zephyr/arch/arm/cortex_a_r/scripts

1 file changed

+41
-39
lines changed

include/zephyr/arch/arm/cortex_a_r/scripts/linker.ld

Lines changed: 41 additions & 39 deletions
Original file line numberDiff line numberDiff line change
@@ -257,7 +257,9 @@ SECTIONS
257257

258258
GROUP_START(RAMABLE_REGION)
259259

260+
#ifdef CONFIG_XIP
260261
. = RAM_ADDR;
262+
#endif
261263
/* Align the start of image RAM with the
262264
* minimum granularity required by MPU.
263265
*/
@@ -282,33 +284,7 @@ SECTIONS
282284
_app_smem_rom_start = LOADADDR(_APP_SMEM_SECTION_NAME);
283285
#endif /* CONFIG_USERSPACE */
284286

285-
SECTION_DATA_PROLOGUE(_BSS_SECTION_NAME,(NOLOAD), BSS_ALIGN)
286-
{
287-
/*
288-
* For performance, BSS section is assumed to be 4 byte aligned and
289-
* a multiple of 4 bytes
290-
*/
291-
. = ALIGN(4);
292-
__bss_start = .;
293-
__kernel_ram_start = .;
294-
295-
*(.bss)
296-
*(".bss.*")
297-
*(COMMON)
298-
*(".kernel_bss.*")
299-
300-
#ifdef CONFIG_CODE_DATA_RELOCATION
301-
#include <linker_sram_bss_relocate.ld>
302-
#endif
303-
304-
/*
305-
* As memory is cleared in words only, it is simpler to ensure the BSS
306-
* section ends on a 4 byte boundary. This wastes a maximum of 3 bytes.
307-
*/
308-
__bss_end = ALIGN(4);
309-
} GROUP_DATA_LINK_IN(RAMABLE_REGION, RAMABLE_REGION)
310-
311-
#include <zephyr/linker/common-noinit.ld>
287+
__kernel_ram_start = .;
312288

313289
SECTION_DATA_PROLOGUE(_DATA_SECTION_NAME,,)
314290
{
@@ -345,12 +321,6 @@ SECTIONS
345321

346322
__data_region_end = .;
347323

348-
349-
/* Define linker symbols */
350-
351-
__kernel_ram_end = RAM_ADDR + RAM_SIZE;
352-
__kernel_ram_size = __kernel_ram_end - __kernel_ram_start;
353-
354324
#if DT_NODE_HAS_STATUS(DT_CHOSEN(zephyr_ocm), okay)
355325
GROUP_START(OCM)
356326

@@ -382,12 +352,6 @@ GROUP_END(OCM)
382352
*/
383353
#include <snippets-sections.ld>
384354

385-
#define LAST_RAM_ALIGN . = ALIGN(_region_min_align);
386-
387-
#include <zephyr/linker/ram-end.ld>
388-
389-
GROUP_END(RAMABLE_REGION)
390-
391355
#include <zephyr/linker/debug-sections.ld>
392356

393357
SECTION_PROLOGUE(.ARM.attributes, 0,)
@@ -413,4 +377,42 @@ GROUP_END(OCM)
413377
* calculate this value here. */
414378
_flash_used = LOADADDR(.last_section) + SIZEOF(.last_section) - __rom_region_start;
415379

380+
SECTION_DATA_PROLOGUE(_BSS_SECTION_NAME,(NOLOAD), BSS_ALIGN)
381+
{
382+
/*
383+
* For performance, BSS section is assumed to be 4 byte aligned and
384+
* a multiple of 4 bytes
385+
*/
386+
. = ALIGN(4);
387+
__bss_start = .;
388+
389+
*(.bss)
390+
*(".bss.*")
391+
*(COMMON)
392+
*(".kernel_bss.*")
393+
394+
#ifdef CONFIG_CODE_DATA_RELOCATION
395+
#include <linker_sram_bss_relocate.ld>
396+
#endif
397+
398+
/*
399+
* As memory is cleared in words only, it is simpler to ensure the BSS
400+
* section ends on a 4 byte boundary. This wastes a maximum of 3 bytes.
401+
*/
402+
__bss_end = ALIGN(4);
403+
} GROUP_DATA_LINK_IN(RAMABLE_REGION, RAMABLE_REGION)
404+
405+
#include <zephyr/linker/common-noinit.ld>
406+
407+
/* Define linker symbols */
408+
409+
__kernel_ram_end = RAM_ADDR + RAM_SIZE;
410+
__kernel_ram_size = __kernel_ram_end - __kernel_ram_start;
411+
412+
#define LAST_RAM_ALIGN . = ALIGN(_region_min_align);
413+
414+
#include <zephyr/linker/ram-end.ld>
415+
416+
GROUP_END(RAMABLE_REGION)
417+
416418
}

0 commit comments

Comments
 (0)