soc: esp32: fixes and updates for AMP

Multiple AMP related updates:

- use common AMP Kconfig
- rework the APPCPU linker script
- use MCUboot image format for APPCPU image
- fix multi-processing startup code

Signed-off-by: Marek Matej <[email protected]>

Author: Marek Matej

soc/espressif/common/Kconfig

@@ -58,6 +58,7 @@ config ESP32_PHY_MAX_TX_POWER
 
 endif
 
+rsource "Kconfig.amp"
 rsource "Kconfig.spiram"
 rsource "Kconfig.esptool"
 rsource "Kconfig.flash"

soc/espressif/common/Kconfig.amp

@@ -0,0 +1,26 @@
+# Copyright (c) 2023 Espressif Systems (Shanghai) Co., Ltd.
+# SPDX-License-Identifier: Apache-2.0
+
+config SOC_ENABLE_APPCPU
+	bool
+	default y
+	depends on (IPM || MBOX)
+	depends on SOC_SERIES_ESP32 || SOC_SERIES_ESP32S3
+	help
+	  This hidden configuration lets PROCPU core to map and start APPCPU whenever IPM is enabled.
+
+menu "Espressif AMP Config"
+
+config ESP_APPCPU_IRAM_SIZE
+	hex "ESP32* APPCPU IRAM size"
+	default 0x10000
+	help
+	  Defines APPCPU IRAM area size in bytes.
+
+config ESP_APPCPU_DRAM_SIZE
+	hex "ESP32* APPCPU DRAM size"
+	default 0x10000
+	help
+	  Defines APPCPU DRAM area size in bytes.
+
+endmenu # AMP config

soc/espressif/common/loader.c

@@ -264,7 +264,8 @@ void __start(void)
 	}
 #endif
 
-#if !defined(CONFIG_MCUBOOT) && !defined(CONFIG_SOC_ESP32S3_APPCPU)
+#if !defined(CONFIG_SOC_ESP32_APPCPU) && !defined(CONFIG_SOC_ESP32S3_APPCPU) && \
+	!defined(CONFIG_MCUBOOT)
 	map_rom_segments(_app_drom_start, _app_drom_vaddr, _app_drom_size, _app_irom_start,
 			 _app_irom_vaddr, _app_irom_size);
 #endif

soc/espressif/esp32/CMakeLists.txt

@@ -1,7 +1,9 @@
 # SPDX-License-Identifier: Apache-2.0
 
 if (CONFIG_SOC_ESP32_APPCPU)
-  zephyr_sources(soc_appcpu.c)
+  zephyr_sources(
+    soc_appcpu.c
+    )
 else()
   zephyr_sources(
     soc.c
@@ -24,13 +26,24 @@ zephyr_library_sources_ifdef(CONFIG_POWEROFF poweroff.c)
 # get flash size to use in esptool as string
 math(EXPR esptoolpy_flashsize "${CONFIG_FLASH_SIZE} / 0x100000")
 
-# This includes CONFIG_MCUBOOT and CONFIG_ESP_SIMPLE_BOOT
-if(NOT CONFIG_BOOTLOADER_MCUBOOT)
+# Get UART baudrate from DT
+dt_chosen(dts_shell_uart PROPERTY "zephyr,shell-uart")
+if(${dts_shell_uart})
+  dt_prop(monitor_baud PATH ${dts_shell_uart} PROPERTY "current-speed")
+endif()
+
+board_runner_args(esp32 "--esp-monitor-baud=${monitor_baud}")
+
+message("-- Espressif HAL path: ${ESP_IDF_PATH}")
+
+# Select image processing
+
+if(CONFIG_ESP_SIMPLE_BOOT OR CONFIG_MCUBOOT)
 
   if(CONFIG_BUILD_OUTPUT_BIN)
 
     set(ESPTOOL_PY ${ESP_IDF_PATH}/tools/esptool_py/esptool.py)
-    message("esptool path: ${ESPTOOL_PY}")
+    message("-- Use the esptool.py: ${ESPTOOL_PY}")
 
     set(ELF2IMAGE_ARG "")
     if(NOT CONFIG_MCUBOOT)
@@ -39,56 +52,47 @@ if(NOT CONFIG_BOOTLOADER_MCUBOOT)
 
     set_property(GLOBAL APPEND PROPERTY extra_post_build_commands
       COMMAND ${PYTHON_EXECUTABLE} ${ESPTOOL_PY}
-      ARGS --chip esp32 elf2image ${ELF2IMAGE_ARG}
+      ARGS --chip ${CONFIG_SOC} elf2image ${ELF2IMAGE_ARG}
       --flash_mode dio --flash_freq 40m
       --flash_size ${esptoolpy_flashsize}MB
       -o ${CMAKE_BINARY_DIR}/zephyr/${CONFIG_KERNEL_BIN_NAME}.bin
       ${CMAKE_BINARY_DIR}/zephyr/${CONFIG_KERNEL_BIN_NAME}.elf)
-  endif()
-
-endif()
-
-## When building for APPCPU
-if (CONFIG_SOC_ESP32_APPCPU)
 
-  if(CONFIG_BUILD_OUTPUT_BIN)
-    set_property(GLOBAL APPEND PROPERTY extra_post_build_commands
-      COMMAND ${PYTHON_EXECUTABLE} ${ESP_IDF_PATH}/tools/esp_bin2c_array.py
-      ARGS -i ${CMAKE_BINARY_DIR}/zephyr/${CONFIG_KERNEL_BIN_NAME}.bin
-      -o ${CMAKE_BINARY_DIR}/zephyr/${CONFIG_KERNEL_BIN_NAME}.c
-      -a "esp32_appcpu_fw_array")
   endif()
 
-else()
+endif()
 
-  set_property(TARGET bintools PROPERTY disassembly_flag_inline_source)
+set_property(TARGET bintools PROPERTY disassembly_flag_inline_source)
 
-  # get code-partition boot address
+  # Select the image origin depending on the boot configuration
+if(CONFIG_SOC_ESP32_APPCPU)
+  dt_nodelabel(dts_partition_path NODELABEL "slot0_appcpu_partition")
+elseif(CONFIG_MCUBOOT)
   dt_nodelabel(dts_partition_path NODELABEL "boot_partition")
-  dt_reg_addr(boot_off PATH ${dts_partition_path})
-
-  # get code-partition slot0 address
+elseif(CONFIG_ESP_SIMPLE_BOOT)
+  dt_nodelabel(dts_partition_path NODELABEL "boot_partition")
+else()
   dt_nodelabel(dts_partition_path NODELABEL "slot0_partition")
-  dt_reg_addr(img_0_off PATH ${dts_partition_path})
+endif()
 
-  if(CONFIG_BOOTLOADER_MCUBOOT)
-    board_finalize_runner_args(esp32 "--esp-app-address=${img_0_off}")
-  else()
-    board_finalize_runner_args(esp32 "--esp-app-address=${boot_off}")
-  endif()
+dt_reg_addr(image_off PATH ${dts_partition_path})
+board_finalize_runner_args(esp32 "--esp-app-address=${image_off}")
 
-endif()
+message("-- Image partition ${dts_partition_path}")
 
+# Look for cross references between bootloader sections
 if(CONFIG_MCUBOOT)
-    # search from cross references between bootloader sections
+
     message("check_callgraph using: ${ESP_IDF_PATH}/tools/ci/check_callgraph.py")
     set_property(GLOBAL APPEND PROPERTY extra_post_build_commands
       COMMAND
         ${PYTHON_EXECUTABLE} ${ESP_IDF_PATH}/tools/ci/check_callgraph.py
       ARGS
         --rtl-dirs ${CMAKE_BINARY_DIR}/zephyr
-	--elf-file ${CMAKE_BINARY_DIR}/zephyr/${CONFIG_KERNEL_BIN_NAME}.elf
-        find-refs --from-section=.iram0.iram_loader --to-section=.iram0.text
+        --elf-file ${CMAKE_BINARY_DIR}/zephyr/${CONFIG_KERNEL_BIN_NAME}.elf
+        find-refs
+        --from-section='.iram0.loader_text'
+        --to-section='.iram0.text'
         --exit-code)
 endif()
 

soc/espressif/esp32/Kconfig

@@ -15,27 +15,6 @@ config SOC_SERIES_ESP32
 
 if SOC_SERIES_ESP32
 
-config ESP32_APPCPU_IRAM
-	hex "ESP32 APPCPU IRAM size"
-	depends on SOC_ESP32_PROCPU || SOC_ESP32_APPCPU
-	default 0x20000
-	help
-	  Defines APPCPU IRAM area in bytes.
-
-config ESP32_APPCPU_DRAM
-	hex "ESP32 APPCPU DRAM size"
-	depends on SOC_ESP32_PROCPU || SOC_ESP32_APPCPU
-	default 0x10000
-	help
-	  Defines APPCPU DRAM area in bytes.
-
-config SOC_ENABLE_APPCPU
-	bool
-	default y
-	depends on (IPM || MBOX) && SOC_ESP32_PROCPU
-	help
-	  This hidden configuration lets PROCPU core to map and start APPCPU whenever IPM is enabled.
-
 config ESP32_BT_RESERVE_DRAM
 	hex "Bluetooth controller reserved RAM region"
 	default 0xdb5c if BT

soc/espressif/esp32/Kconfig.defconfig

@@ -9,6 +9,9 @@ config FLASH_SIZE
 config FLASH_BASE_ADDRESS
 	default $(dt_node_reg_addr_hex,/soc/flash-controller@3ff42000/flash@0)
 
+config BOOTLOADER_MCUBOOT
+	default y if SOC_ESP32_APPCPU
+
 if SMP
 
 config SCHED_IPI_SUPPORTED

soc/espressif/esp32/default.ld

@@ -12,19 +12,15 @@
 
 #include "memory.h"
 
-/* The "user_iram_end" represents the last DRAM memory location
- * that is occupied by the ROM code. Since the "iram_loader_seg"
- * - which is the last memory the bootloader runs from - resides
- * in the SRAM0 "cache" memory, the "user_iram_end" applies for\
- * all build cases - Simple boot and the MCUboot application.
- */
-user_iram_end = SRAM1_DRAM_IRAM_CALC(SRAM1_DRAM_USER_START);
-
 /* User available SRAM memory segments */
-user_iram_seg_org = (SRAM0_IRAM_START + SRAM0_CACHE_SIZE);
-user_iram_seg_len = user_iram_end - user_iram_seg_org;
-user_dram_seg_org = SRAM2_DRAM_USER_START;
-user_dram_seg_len = SRAM2_DRAM_USER_SIZE;
+procpu_iram_end = USER_IRAM_END - APPCPU_SRAM_SIZE;
+procpu_iram_org = SRAM0_IRAM_START + SRAM0_CACHE_SIZE;
+procpu_iram_len = procpu_iram_end - procpu_iram_org;
+
+procpu_dram_end = SRAM2_DRAM_END;
+procpu_dram_org = SRAM2_DRAM_USER_START + CONFIG_ESP32_BT_RESERVE_DRAM;
+procpu_dram_len = SRAM2_DRAM_USER_SIZE - CONFIG_ESP32_BT_RESERVE_DRAM;
+
 user_dram_2_seg_org = SRAM1_DRAM_USER_START;
 user_dram_2_seg_len = SRAM1_USER_SIZE;
 
@@ -36,12 +32,6 @@ user_dram_2_seg_len = SRAM1_USER_SIZE;
 #define RAMABLE_REGION      dram0_0_seg
 #define ROMABLE_REGION      FLASH
 
-#ifndef CONFIG_SOC_ESP32_PROCPU
-#define RAMABLE_REGION_1    dram0_1_seg
-#else
-#define RAMABLE_REGION_1    dram0_0_seg
-#endif
-
 #undef GROUP_DATA_LINK_IN
 #define GROUP_DATA_LINK_IN(vregion, lregion) > vregion AT > lregion
 
@@ -72,26 +62,8 @@ MEMORY
   FLASH (R):       org = 0x0,  len = FLASH_SIZE - 0x100
 #endif /* CONFIG_BOOTLOADER_MCUBOOT */
 
-#ifndef CONFIG_SOC_ESP32_APPCPU
-  iram0_0_seg(RX): org = user_iram_seg_org, len = user_iram_seg_len
-#else
-  iram0_0_seg(RX): org = user_iram_seg_org, len = 0x8000
-#endif /* CONFIG_SOC_ESP32_APPCPU */
-
-  dram0_0_seg(RW): org = user_dram_seg_org + CONFIG_ESP32_BT_RESERVE_DRAM,
-                   len = user_dram_seg_len - CONFIG_ESP32_BT_RESERVE_DRAM
-
-#ifdef CONFIG_SOC_ESP32_PROCPU
-  /* shared RAM reserved for IPM */
-  dram0_shm0_seg(RW): org = 0x3ffe5230, len = 2K
-  /* shared data reserved for IPM data header */
-  dram0_sem0_seg(RW): org = 0x3ffe5a30, len = 8
-  /* for AMP builds dram0_1 is reserved for network core */
-  dram0_1_seg(RW):    org = 0x3ffe5a38, len = 0K
-#else
-  /* skip data for APP CPU initialization usage */
-  dram0_1_seg(RW):    org = user_dram_2_seg_org, len = user_dram_2_seg_len
-#endif /* CONFIG_SOC_ESP32_PROCPU */
+  iram0_0_seg(RX): org = procpu_iram_org, len = procpu_iram_len
+  dram0_0_seg(RW): org = procpu_dram_org, len = procpu_dram_len
 
   irom0_0_seg(RX): org = IROM_SEG_ORG, len = IROM_SEG_LEN
   drom0_0_seg(R):  org = DROM_SEG_ORG, len = DROM_SEG_LEN
@@ -219,7 +191,6 @@ SECTIONS
 
   .iram0.vectors : ALIGN(4)
   {
-    _iram_start = ABSOLUTE(.);
     /* Vectors go to IRAM */
     _init_start = ABSOLUTE(.);
     /* Vectors according to builds/RF-2015.2-win32/esp108_v1_2_s5_512int_2/config.html */
@@ -253,6 +224,7 @@ SECTIONS
     *(.init.literal)
     *(.init)
     _init_end = ABSOLUTE(.);
+    _iram_start = ABSOLUTE(.);
   } GROUP_DATA_LINK_IN(IRAM_REGION, ROMABLE_REGION)
 
   .iram0.text : ALIGN(4)
@@ -712,12 +684,12 @@ SECTIONS
     *(.noinit)
     *(.noinit.*)
     . = ALIGN (8);
-  } GROUP_LINK_IN(RAMABLE_REGION_1)
+  } GROUP_LINK_IN(RAMABLE_REGION)
 
   /* Provide total SRAM usage, including IRAM and DRAM */
   _image_ram_start = _dram_data_start;
   #include <zephyr/linker/ram-end.ld>
-  _image_ram_size += _iram_end - _iram_start;
+  _image_ram_size += _iram_end - _init_start;
 
   ASSERT(((_end - ORIGIN(dram0_0_seg)) <= LENGTH(dram0_0_seg)), "DRAM data does not fit.")