dts/bindings: Fixing x86 CPU compatibles by providing proper yaml files

Make compatible name following the rule as well.

Signed-off-by: Tomasz Bursztyka <[email protected]>

Author: Tomasz Bursztyka

dts/bindings/cpu/intel,apollo_lake.yaml

@@ -0,0 +1,8 @@
+# Copyright (c) 2021 Intel Corp.
+# SPDX-License-Identifier: Apache-2.0
+
+description: Intel Apollo lake CPU
+
+compatible: "intel,apollo_lake"
+
+include: cpu.yaml

dts/bindings/cpu/intel,atom.yaml

@@ -0,0 +1,8 @@
+# Copyright (c) 2021 Intel Corp.
+# SPDX-License-Identifier: Apache-2.0
+
+description: Intel Atom CPU
+
+compatible: "intel,atom"
+
+include: cpu.yaml

dts/bindings/cpu/intel,elkhart_lake.yaml

@@ -0,0 +1,8 @@
+# Copyright (c) 2021 Intel Corp.
+# SPDX-License-Identifier: Apache-2.0
+
+description: Intel Elkhart Lake CPU
+
+compatible: "intel,elkhart_lake"
+
+include: cpu.yaml

dts/bindings/cpu/intel,x86.yaml

@@ -0,0 +1,8 @@
+# Copyright (c) 2021 Intel Corp.
+# SPDX-License-Identifier: Apache-2.0
+
+description: Generic x86 qemu CPU
+
+compatible: "intel,x86"
+
+include: cpu.yaml

dts/x86/apollo_lake.dtsi

@@ -16,7 +16,7 @@
 
 		cpu@0 {
 			device_type = "cpu";
-			compatible = "apollo_lake";
+			compatible = "intel,apollo_lake";
 			d-cache-line-size = <64>;
 			reg = <0>;
 		};

dts/x86/atom.dtsi

@@ -14,7 +14,7 @@
 
 		cpu@0 {
 			device_type = "cpu";
-			compatible = "atom";
+			compatible = "intel,atom";
 			d-cache-line-size = <64>;
 			reg = <0>;
 		};

dts/x86/elkhart_lake.dtsi

@@ -16,7 +16,7 @@
 
 		cpu@0 {
 			device_type = "cpu";
-			compatible = "elkhart_lake";
+			compatible = "intel,elkhart_lake";
 			d-cache-line-size = <64>;
 			reg = <0>;
 		};

dts/x86/ia32.dtsi

@@ -14,7 +14,7 @@
 
 		cpu@0 {
 			device_type = "cpu";
-			compatible = "qemu32";
+			compatible = "intel,x86";
 			d-cache-line-size = <64>;
 			reg = <0>;
 		};