boards: mimxrt1064: Enabled new SDHC driver

Enabled new SDHC driver for mimxrt1064 evk

Signed-off-by: Daniel DeGrasse <[email protected]>

Author: danieldegrasse

boards/arm/mimxrt1064_evk/Kconfig.defconfig

@@ -15,6 +15,9 @@ endchoice
 config DISK_DRIVER_SDMMC
 	default y if DISK_DRIVERS
 
+config IMX_USDHC
+	default y if SDHC
+
 config FLASH_MCUX_FLEXSPI_NOR
 	default y if FLASH
 

soc/arm/nxp_imx/rt/CMakeLists.txt

@@ -41,6 +41,8 @@ endif()
 zephyr_compile_definitions(
   XIP_EXTERNAL_FLASH
 )
+zephyr_linker_sources(
+  RWDATA nocache.ld)
 
 zephyr_linker_section_configure(
   SECTION .rom_start

soc/arm/nxp_imx/rt/nocache.ld

@@ -0,0 +1,8 @@
+/*
+ * Copyright (c) 2020 NXP
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ */
+
+. = ALIGN(4);
+KEEP(*(NonCacheable))

soc/arm/nxp_imx/rt/soc_rt10xx.c

@@ -187,14 +187,14 @@ static ALWAYS_INLINE void clock_init(void)
 	USB_EhciPhyInit(kUSB_ControllerEhci1, CPU_XTAL_CLK_HZ, &usbPhyConfig);
 #endif
 
-#if DT_NODE_HAS_STATUS(DT_NODELABEL(usdhc1), okay) && CONFIG_DISK_DRIVER_SDMMC
+#if DT_NODE_HAS_STATUS(DT_NODELABEL(usdhc1), okay) && CONFIG_IMX_USDHC
 	/* Configure USDHC clock source and divider */
 	CLOCK_InitSysPfd(kCLOCK_Pfd0, 24U);
 	CLOCK_SetDiv(kCLOCK_Usdhc1Div, 1U);
 	CLOCK_SetMux(kCLOCK_Usdhc1Mux, 1U);
 	CLOCK_EnableClock(kCLOCK_Usdhc1);
 #endif
-#if DT_NODE_HAS_STATUS(DT_NODELABEL(usdhc2), okay) && CONFIG_DISK_DRIVER_SDMMC
+#if DT_NODE_HAS_STATUS(DT_NODELABEL(usdhc2), okay) && CONFIG_IMX_USDHC
 	/* Configure USDHC clock source and divider */
 	CLOCK_InitSysPfd(kCLOCK_Pfd0, 24U);
 	CLOCK_SetDiv(kCLOCK_Usdhc2Div, 1U);