@@ -683,14 +683,6 @@ static void adin2111_offload_thread(void *p1, void *p2, void *p3)
683683 goto continue_unlock ;
684684 }
685685
686- if (!ctx -> oa ) {
687- #if CONFIG_ETH_ADIN2111_SPI_CFG0
688- if (status0 & ADIN2111_STATUS1_SPI_ERR ) {
689- LOG_WRN ("Detected TX SPI CRC error" );
690- }
691- #endif
692- }
693-
694686 /* handle port 1 phy interrupts */
695687 if (status0 & ADIN2111_STATUS0_PHYINT ) {
696688 adin2111_port_on_phyint (ctx -> port [0 ]);
@@ -705,46 +697,53 @@ static void adin2111_offload_thread(void *p1, void *p2, void *p3)
705697 if (status1 & ADIN2111_STATUS1_P1_RX_RDY ) {
706698 ret = eth_adin2111_oa_data_read (dev , 0 );
707699 if (ret < 0 ) {
708- break ;
700+ goto continue_unlock ;
709701 }
710702 }
711703 if (status1 & ADIN2111_STATUS1_P2_RX_RDY ) {
712704 ret = eth_adin2111_oa_data_read (dev , 1 );
713- if (ret < 0 ) {
714- break ;
715- }
716- }
717- goto continue_unlock ;
718- }
719-
720- /* handle port 1 rx */
721- if (status1 & ADIN2111_STATUS1_P1_RX_RDY ) {
722- do {
723- ret = adin2111_read_fifo (dev , 0U );
724- if (ret < 0 ) {
725- break ;
726- }
727-
728- ret = eth_adin2111_reg_read (dev , ADIN2111_STATUS1 , & status1 );
729705 if (ret < 0 ) {
730706 goto continue_unlock ;
731707 }
732- } while (!!(status1 & ADIN2111_STATUS1_P1_RX_RDY ));
733- }
708+ }
709+ } else {
710+ #if CONFIG_ETH_ADIN2111_SPI_CFG0
711+ if (status0 & ADIN2111_STATUS1_SPI_ERR ) {
712+ LOG_WRN ("Detected TX SPI CRC error" );
713+ }
714+ #endif /* CONFIG_ETH_ADIN2111_SPI_CFG0 */
734715
735- /* handle port 2 rx */
736- if ((status1 & ADIN2111_STATUS1_P2_RX_RDY ) && is_adin2111 ) {
737- do {
738- ret = adin2111_read_fifo (dev , 1U );
739- if (ret < 0 ) {
740- break ;
741- }
716+ /* handle port 1 rx */
717+ if (status1 & ADIN2111_STATUS1_P1_RX_RDY ) {
718+ do {
719+ ret = adin2111_read_fifo (dev , 0U );
720+ if (ret < 0 ) {
721+ break ;
722+ }
723+
724+ ret = eth_adin2111_reg_read (dev , ADIN2111_STATUS1 ,
725+ & status1 );
726+ if (ret < 0 ) {
727+ goto continue_unlock ;
728+ }
729+ } while (!!(status1 & ADIN2111_STATUS1_P1_RX_RDY ));
730+ }
742731
743- ret = eth_adin2111_reg_read (dev , ADIN2111_STATUS1 , & status1 );
744- if (ret < 0 ) {
745- goto continue_unlock ;
746- }
747- } while (!!(status1 & ADIN2111_STATUS1_P2_RX_RDY ));
732+ /* handle port 2 rx */
733+ if ((status1 & ADIN2111_STATUS1_P2_RX_RDY ) && is_adin2111 ) {
734+ do {
735+ ret = adin2111_read_fifo (dev , 1U );
736+ if (ret < 0 ) {
737+ break ;
738+ }
739+
740+ ret = eth_adin2111_reg_read (dev , ADIN2111_STATUS1 ,
741+ & status1 );
742+ if (ret < 0 ) {
743+ goto continue_unlock ;
744+ }
745+ } while (!!(status1 & ADIN2111_STATUS1_P2_RX_RDY ));
746+ }
748747 }
749748
750749continue_unlock :
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