arch: arm: cortex_m: scb: fix MPU code compilation guards

gmarull · carlescufi · commit 33b116407b03 · 2023-06-29T23:46:39.000+02:00
The implementation of `z_arm_clear_arm_mpu_config` was compiled for all
ARM cores that declare to have an MPU. However, we only want to compile
it if the MPU is actually enabled.

Signed-off-by: Gerard Marull-Paretas &lt;gerard.marull@nordicsemi.no&gt;
diff --git a/arch/arm/core/aarch32/cortex_m/scb.c b/arch/arm/core/aarch32/cortex_m/scb.c
@@ -41,6 +41,7 @@ void __weak sys_arch_reboot(int type)
 	NVIC_SystemReset();
 }
 
+#if defined(CONFIG_ARM_MPU)
 #if defined(CONFIG_CPU_HAS_ARM_MPU)
 /**
  *
@@ -75,6 +76,7 @@ void z_arm_clear_arm_mpu_config(void)
 	}
 }
 #endif /* CONFIG_CPU_HAS_NXP_MPU */
+#endif /* CONFIG_ARM_MPU */
 
 #if defined(CONFIG_INIT_ARCH_HW_AT_BOOT)
 /**
@@ -96,10 +98,10 @@ void z_arm_init_arch_hw_at_boot(void)
 
 	/* Initialize System Control Block components */
 
-#if defined(CONFIG_CPU_HAS_ARM_MPU) || defined(CONFIG_CPU_HAS_NXP_MPU)
+#if defined(CONFIG_ARM_MPU)
 	/* Clear MPU region configuration */
 	z_arm_clear_arm_mpu_config();
-#endif /* CONFIG_CPU_HAS_ARM_MPU */
+#endif /* CONFIG_ARM_MPU */
 
 	/* Disable NVIC interrupts */
 	for (uint8_t i = 0; i < ARRAY_SIZE(NVIC->ICER); i++) {

Original file line number	Diff line number	Diff line change
`@@ -41,6 +41,7 @@ void __weak sys_arch_reboot(int type)`
`41`	`41`	`NVIC_SystemReset();`
`42`	`42`	`}`
`43`	`43`
	`44`	`+#if defined(CONFIG_ARM_MPU)`
`44`	`45`	`#if defined(CONFIG_CPU_HAS_ARM_MPU)`
`45`	`46`	`/**`
`46`	`47`	`*`
`@@ -75,6 +76,7 @@ void z_arm_clear_arm_mpu_config(void)`
`75`	`76`	`}`
`76`	`77`	`}`
`77`	`78`	`#endif /* CONFIG_CPU_HAS_NXP_MPU */`
	`79`	`+#endif /* CONFIG_ARM_MPU */`
`78`	`80`
`79`	`81`	`#if defined(CONFIG_INIT_ARCH_HW_AT_BOOT)`
`80`	`82`	`/**`
`@@ -96,10 +98,10 @@ void z_arm_init_arch_hw_at_boot(void)`
`96`	`98`
`97`	`99`	`/* Initialize System Control Block components */`
`98`	`100`
`99`		`-#if defined(CONFIG_CPU_HAS_ARM_MPU) \|\| defined(CONFIG_CPU_HAS_NXP_MPU)`
	`101`	`+#if defined(CONFIG_ARM_MPU)`
`100`	`102`	`/* Clear MPU region configuration */`
`101`	`103`	`z_arm_clear_arm_mpu_config();`
`102`		`-#endif /* CONFIG_CPU_HAS_ARM_MPU */`
	`104`	`+#endif /* CONFIG_ARM_MPU */`
`103`	`105`
`104`	`106`	`/* Disable NVIC interrupts */`
`105`	`107`	`for (uint8_t i = 0; i < ARRAY_SIZE(NVIC->ICER); i++) {`