arch: x86_64: Rename _exception_stack to z_x86_exception_stack

Rename stack name according to MISRA-C standard.

Signed-off-by: Andrei Emeltchenko <[email protected]>

Author: finikorg

arch/x86/core/intel64/cpu.c

@@ -23,10 +23,10 @@ __weak uint8_t x86_cpu_loapics[] = { 0, 1, 2, 3 };
 
 extern char x86_ap_start[];  /* AP entry point in locore.S */
 
-extern uint8_t _exception_stack[];
-extern uint8_t _exception_stack1[];
-extern uint8_t _exception_stack2[];
-extern uint8_t _exception_stack3[];
+extern uint8_t z_x86_exception_stack[];
+extern uint8_t z_x86_exception_stack1[];
+extern uint8_t z_x86_exception_stack2[];
+extern uint8_t z_x86_exception_stack3[];
 
 extern uint8_t z_x86_nmi_stack[];
 extern uint8_t z_x86_nmi_stack1[];
@@ -46,7 +46,7 @@ struct x86_tss64 tss0 = {
 	.ist2 = (uint64_t) z_x86_trampoline_stack + Z_X86_TRAMPOLINE_STACK_SIZE,
 #endif
 	.ist6 = (uint64_t) z_x86_nmi_stack + CONFIG_X86_EXCEPTION_STACK_SIZE,
-	.ist7 = (uint64_t) _exception_stack + CONFIG_X86_EXCEPTION_STACK_SIZE,
+	.ist7 = (uint64_t) z_x86_exception_stack + CONFIG_X86_EXCEPTION_STACK_SIZE,
 	.iomapb = 0xFFFF,
 	.cpu = &(_kernel.cpus[0])
 };
@@ -58,7 +58,7 @@ struct x86_tss64 tss1 = {
 	.ist2 = (uint64_t) z_x86_trampoline_stack1 + Z_X86_TRAMPOLINE_STACK_SIZE,
 #endif
 	.ist6 = (uint64_t) z_x86_nmi_stack1 + CONFIG_X86_EXCEPTION_STACK_SIZE,
-	.ist7 = (uint64_t) _exception_stack1 + CONFIG_X86_EXCEPTION_STACK_SIZE,
+	.ist7 = (uint64_t) z_x86_exception_stack1 + CONFIG_X86_EXCEPTION_STACK_SIZE,
 	.iomapb = 0xFFFF,
 	.cpu = &(_kernel.cpus[1])
 };
@@ -71,7 +71,7 @@ struct x86_tss64 tss2 = {
 	.ist2 = (uint64_t) z_x86_trampoline_stack2 + Z_X86_TRAMPOLINE_STACK_SIZE,
 #endif
 	.ist6 = (uint64_t) z_x86_nmi_stack2 + CONFIG_X86_EXCEPTION_STACK_SIZE,
-	.ist7 = (uint64_t) _exception_stack2 + CONFIG_X86_EXCEPTION_STACK_SIZE,
+	.ist7 = (uint64_t) z_x86_exception_stack2 + CONFIG_X86_EXCEPTION_STACK_SIZE,
 	.iomapb = 0xFFFF,
 	.cpu = &(_kernel.cpus[2])
 };
@@ -84,7 +84,7 @@ struct x86_tss64 tss3 = {
 	.ist2 = (uint64_t) z_x86_trampoline_stack3 + Z_X86_TRAMPOLINE_STACK_SIZE,
 #endif
 	.ist6 = (uint64_t) z_x86_nmi_stack3 + CONFIG_X86_EXCEPTION_STACK_SIZE,
-	.ist7 = (uint64_t) _exception_stack3 + CONFIG_X86_EXCEPTION_STACK_SIZE,
+	.ist7 = (uint64_t) z_x86_exception_stack3 + CONFIG_X86_EXCEPTION_STACK_SIZE,
 	.iomapb = 0xFFFF,
 	.cpu = &(_kernel.cpus[3])
 };

arch/x86/core/intel64/locore.S

@@ -1066,19 +1066,19 @@ gdt80:  /* LGDT descriptor for long mode */
  * Known-good stack for handling CPU exceptions.
  */
 
-.global _exception_stack
+.global z_x86_exception_stack
 .align 16
-_exception_stack:
+z_x86_exception_stack:
 	.fill CONFIG_X86_EXCEPTION_STACK_SIZE, 1, 0xAA
 .global z_x86_nmi_stack
 .align 16
 z_x86_nmi_stack:
 	.fill CONFIG_X86_EXCEPTION_STACK_SIZE, 1, 0xAA
 
 #if CONFIG_MP_NUM_CPUS > 1
-.global _exception_stack1
+.global z_x86_exception_stack1
 .align 16
-_exception_stack1:
+z_x86_exception_stack1:
 	.fill CONFIG_X86_EXCEPTION_STACK_SIZE, 1, 0xAA
 .global z_x86_nmi_stack1
 .align 16
@@ -1087,9 +1087,9 @@ z_x86_nmi_stack1:
 #endif
 
 #if CONFIG_MP_NUM_CPUS > 2
-.global _exception_stack2
+.global z_x86_exception_stack2
 .align 16
-_exception_stack2:
+z_x86_exception_stack2:
 	.fill CONFIG_X86_EXCEPTION_STACK_SIZE, 1, 0xAA
 .global z_x86_nmi_stack2
 .align 16
@@ -1098,9 +1098,9 @@ z_x86_nmi_stack2:
 #endif
 
 #if CONFIG_MP_NUM_CPUS > 3
-.global _exception_stack3
+.global z_x86_exception_stack3
 .align 16
-_exception_stack3:
+z_x86_exception_stack3:
 	.fill CONFIG_X86_EXCEPTION_STACK_SIZE, 1, 0xAA
 .global z_x86_nmi_stack3
 .align 16