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boards: arm: stm32f401re nucleo board revision C01
Define a HW revision of nucleo_f401re (MB1136) rev C-01 corresponds to a board, configured as HSE not used then forcing the HSI for the DTS of that board. rev C-02 (or higher) corresponds to a board, configured to use ST-LINK MCO as the clock input (HSE bypass). To build with "west build -b nucleo_f401re@C01 samples/hello_world" The default HW revision is C-02 (for any board rev. C-02 and above) Signed-off-by: Francois Ramu <[email protected]>
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boards/arm/nucleo_f401re/doc/index.rst

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Nucleo F401RE System Clock could be driven by internal or external oscillator,
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as well as main PLL clock. By default System clock is driven by PLL clock at 84MHz,
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driven by 8MHz high speed external clock.
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- driven by 8MHz high speed external clock (HSE) for board revision C02 and above
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- driven by 16MHz high speed internal clock (HSI) for board revision C01
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Serial Port
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===========
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# Copyright (c) 2023 STMicroelecronics
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# SPDX-License-Identifier: Apache-2.0
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/*
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* Copyright (c) 2023, STMicroelectronics
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*
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* SPDX-License-Identifier: Apache-2.0
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*/
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&clk_hse {
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/* HSE not used on this board revision */
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status = "disabled";
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};
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&clk_hsi {
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/* use HSI */
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status = "okay";
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};
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&pll {
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/delete-property/ div-m;
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div-m = <16>;
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/delete-property/ clocks;
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clocks = <&clk_hsi>;
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};
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identifier: nucleo_f401re@C01
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name: ST Nucleo F401RE rev C-01
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type: mcu
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arch: arm
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toolchain:
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- zephyr
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- gnuarmemb
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- xtools
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supported:
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- arduino_gpio
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- arduino_i2c
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- arduino_spi
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- pwm
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- counter
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- gpio
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- i2c
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- spi
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- adc
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- watchdog
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ram: 96
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flash: 512
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# Copyright (c) 2023 STMicroelecronics
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# SPDX-License-Identifier: Apache-2.0
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board_check_revision(
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FORMAT ALPHANUM
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DEFAULT_REVISION C02
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)

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