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55 | 55 | nxp,resource-id = <IMX_SC_R_IRQSTR_DSP>; |
56 | 56 | #power-domain-cells = <0>; |
57 | 57 | }; |
| 58 | + |
| 59 | + edma0_ch6_pd: pd@1 { |
| 60 | + compatible = "nxp,imx8qm-scu-pd", "nxp,scu-pd"; |
| 61 | + reg = <1>; |
| 62 | + nxp,resource-id = <IMX_SC_R_DMA_0_CH6>; |
| 63 | + #power-domain-cells = <0>; |
| 64 | + }; |
| 65 | + |
| 66 | + edma0_ch7_pd: pd@2 { |
| 67 | + compatible = "nxp,imx8qm-scu-pd", "nxp,scu-pd"; |
| 68 | + reg = <2>; |
| 69 | + nxp,resource-id = <IMX_SC_R_DMA_0_CH7>; |
| 70 | + #power-domain-cells = <0>; |
| 71 | + }; |
| 72 | + |
| 73 | + edma0_ch14_pd: pd@3 { |
| 74 | + compatible = "nxp,imx8qm-scu-pd", "nxp,scu-pd"; |
| 75 | + reg = <3>; |
| 76 | + nxp,resource-id = <IMX_SC_R_DMA_0_CH14>; |
| 77 | + #power-domain-cells = <0>; |
| 78 | + }; |
| 79 | + |
| 80 | + edma0_ch15_pd: pd@4 { |
| 81 | + compatible = "nxp,imx8qm-scu-pd", "nxp,scu-pd"; |
| 82 | + reg = <4>; |
| 83 | + nxp,resource-id = <IMX_SC_R_DMA_0_CH15>; |
| 84 | + #power-domain-cells = <0>; |
| 85 | + }; |
| 86 | + |
| 87 | + edma2_ch6_pd: pd@5 { |
| 88 | + compatible = "nxp,imx8qm-scu-pd", "nxp,scu-pd"; |
| 89 | + reg = <5>; |
| 90 | + nxp,resource-id = <IMX_SC_R_DMA_2_CH6>; |
| 91 | + #power-domain-cells = <0>; |
| 92 | + }; |
| 93 | + |
| 94 | + edma2_ch7_pd: pd@6 { |
| 95 | + compatible = "nxp,imx8qm-scu-pd", "nxp,scu-pd"; |
| 96 | + reg = <6>; |
| 97 | + nxp,resource-id = <IMX_SC_R_DMA_2_CH7>; |
| 98 | + #power-domain-cells = <0>; |
| 99 | + }; |
| 100 | + |
| 101 | + edma2_ch14_pd: pd@7 { |
| 102 | + compatible = "nxp,imx8qm-scu-pd", "nxp,scu-pd"; |
| 103 | + reg = <7>; |
| 104 | + nxp,resource-id = <IMX_SC_R_DMA_2_CH14>; |
| 105 | + #power-domain-cells = <0>; |
| 106 | + }; |
| 107 | + |
| 108 | + edma2_ch15_pd: pd@8 { |
| 109 | + compatible = "nxp,imx8qm-scu-pd", "nxp,scu-pd"; |
| 110 | + reg = <8>; |
| 111 | + nxp,resource-id = <IMX_SC_R_DMA_2_CH15>; |
| 112 | + #power-domain-cells = <0>; |
| 113 | + }; |
58 | 114 | }; |
59 | 115 | }; |
60 | 116 |
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74 | 130 | compatible = "nxp,edma"; |
75 | 131 | reg = <0x591f0000 (DT_SIZE_K(64) * 33)>; |
76 | 132 | valid-channels = <6>, <7>, <14>, <15>; |
| 133 | + power-domains = <&edma0_ch6_pd>, <&edma0_ch7_pd>, |
| 134 | + <&edma0_ch14_pd>, <&edma0_ch15_pd>; |
77 | 135 | interrupts-extended = <&master6 58>, <&master6 58>, |
78 | 136 | <&master5 29>, <&master5 29>; |
79 | 137 | #dma-cells = <2>; |
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