drivers: flash: stm32h7 with RDP protection

Implement the readout protection for the STM32H7 series.
Define the specific functions used by the flash_stm32h7.
Move the stm32h7 flash register manipulation in a write_optb()
to be called by the flash_stm32_set_rdp_level.

Signed-off-by: Francois Ramu <[email protected]>

Author: FRASTM

drivers/flash/CMakeLists.txt

@@ -90,6 +90,7 @@ if(CONFIG_FLASH_MCUX_FLEXSPI_XIP)
 endif()
 
 if(CONFIG_SOC_FLASH_STM32)
+  zephyr_library_sources_ifdef(CONFIG_FLASH_EX_OP_ENABLED flash_stm32_ex_op.c)
   if(CONFIG_SOC_SERIES_STM32H7X)
     zephyr_library_sources_ifdef(CONFIG_DT_HAS_ST_STM32H7_FLASH_CONTROLLER_ENABLED flash_stm32h7x.c)
   elseif(CONFIG_SOC_SERIES_STM32H7RSX)
@@ -106,7 +107,6 @@ if(CONFIG_SOC_FLASH_STM32)
   else()
     if(CONFIG_DT_HAS_ST_STM32_FLASH_CONTROLLER_ENABLED)
       zephyr_library_sources(flash_stm32.c)
-      zephyr_library_sources_ifdef(CONFIG_FLASH_EX_OP_ENABLED flash_stm32_ex_op.c)
 
 # zephyr-keep-sorted-start
       zephyr_library_sources_ifdef(CONFIG_DT_HAS_ST_STM32F1_FLASH_CONTROLLER_ENABLED flash_stm32f1x.c)

drivers/flash/Kconfig.stm32

@@ -51,7 +51,8 @@ config FLASH_STM32_WRITE_PROTECT_DISABLE_PREVENTION
 config FLASH_STM32_READOUT_PROTECTION
 	bool "Extended operation for flash readout protection control"
 	depends on SOC_SERIES_STM32F4X || SOC_SERIES_STM32L4X || \
-			   SOC_SERIES_STM32G4X || SOC_SERIES_STM32F7X
+			   SOC_SERIES_STM32G4X || SOC_SERIES_STM32F7X || \
+			   SOC_SERIES_STM32H7X
 	select FLASH_HAS_EX_OP
 	default n
 	help

drivers/flash/flash_stm32.c

@@ -368,8 +368,7 @@ int flash_stm32_control_register_disable(const struct device *dev)
 {
 	FLASH_TypeDef *regs = FLASH_STM32_REGS(dev);
 
-#if defined(FLASH_CR_LOCK) /* F0, F1, F2, F3, F4, F7, L4, G0, G4, WB, WL   \
-			    */
+#if defined(FLASH_CR_LOCK) /* F0, F1, F2, F3, F4, F7, L4, G0, G4, WB, WL */
 	/*
 	 * Access to control register can be disabled by writing wrong key to
 	 * the key register. Option register will remain disabled until reset.
@@ -462,7 +461,7 @@ static int stm32_flash_init(const struct device *dev)
 {
 	int rc;
 	/* Below is applicable to F0, F1, F3, G0, G4, L1, L4, L5, U5 & WB55 series.
-	 * For F2, F4, F7 & H7 series, this is not applicable.
+	 * For F2, F4, F7 series, this is not applicable.
 	 */
 #if DT_INST_NODE_HAS_PROP(0, clocks)
 	struct flash_stm32_priv *p = FLASH_STM32_PRIV(dev);

drivers/flash/flash_stm32h7x.c

@@ -62,6 +62,78 @@ struct flash_stm32_sector_t {
 	volatile uint32_t *sr;
 };
 
+static __unused int write_optb(const struct device *dev, uint32_t mask,
+			       uint32_t value)
+{
+	FLASH_TypeDef *regs = FLASH_STM32_REGS(dev);
+	int rc;
+
+	if (regs->OPTCR & FLASH_OPTCR_OPTLOCK) {
+		LOG_ERR("Option bytes locked");
+		return -EIO;
+	}
+
+	if ((regs->OPTCR & mask) == value) {
+		/* Done already */
+		return 0;
+	}
+
+	rc = flash_stm32_wait_flash_idle(dev);
+	if (rc < 0) {
+		LOG_ERR("Err flash no idle");
+		return rc;
+	}
+
+	regs->OPTCR = (regs->OPTCR & ~mask) | value;
+	regs->OPTCR |= FLASH_OPTCR_OPTSTART;
+
+	/* Make sure previous write is completed. */
+	barrier_dsync_fence_full();
+
+	rc = flash_stm32_wait_flash_idle(dev);
+	if (rc < 0) {
+		LOG_ERR("Err flash no idle");
+		return rc;
+	}
+
+	return 0;
+}
+
+#if defined(CONFIG_FLASH_STM32_READOUT_PROTECTION)
+uint8_t flash_stm32_get_rdp_level(const struct device *dev)
+{
+	FLASH_TypeDef *regs = FLASH_STM32_REGS(dev);
+
+	return (regs->OPTSR_CUR & FLASH_OPTSR_RDP_Msk) >> FLASH_OPTSR_RDP_Pos;
+}
+
+void flash_stm32_set_rdp_level(const struct device *dev, uint8_t level)
+{
+	write_optb(dev, FLASH_OPTSR_RDP_Msk,
+		(uint32_t)level << FLASH_OPTSR_RDP_Pos);
+}
+#endif /* CONFIG_FLASH_STM32_READOUT_PROTECTION */
+
+int flash_stm32_option_bytes_lock(const struct device *dev, bool enable)
+{
+	FLASH_TypeDef *regs = FLASH_STM32_REGS(dev);
+
+	if (enable) {
+		regs->OPTCR |= FLASH_OPTCR_OPTLOCK;
+	} else if (regs->OPTCR & FLASH_OPTCR_OPTLOCK) {
+		regs->OPTKEYR = FLASH_OPT_KEY1;
+		regs->OPTKEYR = FLASH_OPT_KEY2;
+	}
+
+	if (enable) {
+		LOG_DBG("Option bytes locked");
+	} else {
+		LOG_DBG("Option bytes unlocked");
+	}
+
+	return 0;
+}
+
 bool flash_stm32_valid_range(const struct device *dev, off_t offset, uint32_t len, bool write)
 {
 #if defined(DUAL_BANK)
@@ -649,6 +721,9 @@ static DEVICE_API(flash, flash_stm32h7_api) = {
 #ifdef CONFIG_FLASH_PAGE_LAYOUT
 	.page_layout = flash_stm32_page_layout,
 #endif
+#ifdef CONFIG_FLASH_EX_OP_ENABLED
+	.ex_op = flash_stm32_ex_op,
+#endif
 };
 
 static int stm32h7_flash_init(const struct device *dev)