|
| 1 | +/* |
| 2 | + * Copyright (c) 2025 Sequans Communications |
| 3 | + * |
| 4 | + * SPDX-License-Identifier: Apache-2.0 |
| 5 | + */ |
| 6 | + |
| 7 | +/** |
| 8 | + * @file |
| 9 | + * @brief HW spinlock Devicetree macro public API header file. |
| 10 | + */ |
| 11 | + |
| 12 | +#ifndef ZEPHYR_INCLUDE_DEVICETREE_HWSPINLOCK_H_ |
| 13 | +#define ZEPHYR_INCLUDE_DEVICETREE_HWSPINLOCK_H_ |
| 14 | + |
| 15 | +#ifdef __cplusplus |
| 16 | +extern "C" { |
| 17 | +#endif |
| 18 | + |
| 19 | +/** |
| 20 | + * @defgroup devicetree-hwspinlock Devicetree HW spinlock API |
| 21 | + * @ingroup devicetree |
| 22 | + * @{ |
| 23 | + */ |
| 24 | + |
| 25 | +/** |
| 26 | + * @brief Get the node identifier for the hardware spinlock controller from a hwlocks property by id |
| 27 | + * |
| 28 | + * Example devicetree fragment: |
| 29 | + * |
| 30 | + * hwlock1: hwspinlock-controller@... { ... }; |
| 31 | + * hwlock2: hwspinlock-controller@... { ... }; |
| 32 | + * |
| 33 | + * n: node { |
| 34 | + * hwlocks = <&hwlock1 8>, |
| 35 | + * <&hwlock2 1>; |
| 36 | + * hwlock-names = "rd", "wr"; |
| 37 | + * }; |
| 38 | + * |
| 39 | + * Example usage: |
| 40 | + * |
| 41 | + * DT_HWSPINLOCK_CTRL_BY_IDX(DT_NODELABEL(n), 0) // DT_NODELABEL(hwlock1) |
| 42 | + * DT_HWSPINLOCK_CTRL_BY_IDX(DT_NODELABEL(n), 1) // DT_NODELABEL(hwlock2) |
| 43 | + * |
| 44 | + * @param node_id node identifier for a node with a hwlocks property |
| 45 | + * @param idx index of a hwlocks element in the hwlocks |
| 46 | + * |
| 47 | + * @return the node identifier for the hardware spinlock controller in the named element |
| 48 | + * |
| 49 | + * @see DT_PHANDLE_BY_IDX() |
| 50 | + */ |
| 51 | +#define DT_HWSPINLOCK_CTRL_BY_IDX(node_id, idx) \ |
| 52 | + DT_PHANDLE_BY_IDX(node_id, hwlocks, idx) |
| 53 | + |
| 54 | +/** |
| 55 | + * @brief Get the node identifier for the hardware spinlock controller from a hwlocks property by |
| 56 | + * name |
| 57 | + * |
| 58 | + * Example devicetree fragment: |
| 59 | + * |
| 60 | + * hwlock1: hwspinlock-controller@... { ... }; |
| 61 | + * hwlock2: hwspinlock-controller@... { ... }; |
| 62 | + * |
| 63 | + * n: node { |
| 64 | + * hwlocks = <&hwlock1 8>, |
| 65 | + * <&hwlock2 1>; |
| 66 | + * hwlock-names = "rd", "wr"; |
| 67 | + * }; |
| 68 | + * |
| 69 | + * Example usage: |
| 70 | + * |
| 71 | + * DT_HWSPINLOCK_CTRL_BY_NAME(DT_NODELABEL(n), rd) // DT_NODELABEL(hwlock1) |
| 72 | + * DT_HWSPINLOCK_CTRL_BY_NAME(DT_NODELABEL(n), wr) // DT_NODELABEL(hwlock2) |
| 73 | + * |
| 74 | + * @param node_id node identifier for a node with a hwlocks property |
| 75 | + * @param name lowercase-and-underscores name of a hwlocks element |
| 76 | + * as defined by the node's hwlocks-names property |
| 77 | + * |
| 78 | + * @return the node identifier for the hardware spinlock controller in the named element |
| 79 | + * |
| 80 | + * @see DT_PHANDLE_BY_NAME() |
| 81 | + */ |
| 82 | +#define DT_HWSPINLOCK_CTRL_BY_NAME(node_id, name) \ |
| 83 | + DT_PHANDLE_BY_NAME(node_id, hwlocks, name) |
| 84 | + |
| 85 | +/** |
| 86 | + * @brief Get a hardware spinlock id by name |
| 87 | + * |
| 88 | + * Example devicetree fragment: |
| 89 | + * |
| 90 | + * hwlock1: hwspinlock-controller@... { |
| 91 | + * #hwlock-cells = <1>; |
| 92 | + * }; |
| 93 | + * |
| 94 | + * n: node { |
| 95 | + * hwlocks = <&hwlock1 1>, |
| 96 | + * <&hwlock1 6>; |
| 97 | + * hwlock-names = "rd", "wr"; |
| 98 | + * }; |
| 99 | + * |
| 100 | + * Bindings fragment for the hwspinlock compatible: |
| 101 | + * |
| 102 | + * hwlock-cells: |
| 103 | + * - id |
| 104 | + * |
| 105 | + * Example usage: |
| 106 | + * |
| 107 | + * DT_HWSPINLOCK_ID_BY_NAME(DT_NODELABEL(n), rd) // 1 |
| 108 | + * DT_HWSPINLOCK_ID_BY_NAME(DT_NODELABEL(n), wr) // 6 |
| 109 | + * |
| 110 | + * @param node_id node identifier for a node with a hwlocks property |
| 111 | + * @param name lowercase-and-underscores name of a hwlocks element |
| 112 | + * as defined by the node's hwlock-names property |
| 113 | + * |
| 114 | + * @return the channel value in the specifier at the named element or 0 if no |
| 115 | + * channels are supported |
| 116 | + * |
| 117 | + * @see DT_PHA_BY_NAME() |
| 118 | + */ |
| 119 | +#define DT_HWSPINLOCK_ID_BY_NAME(node_id, name) \ |
| 120 | + DT_PHA_BY_NAME(node_id, hwlocks, name, id) |
| 121 | + |
| 122 | +/** |
| 123 | + * @brief Get a hardware spinlock id by index |
| 124 | + * |
| 125 | + * Example devicetree fragment: |
| 126 | + * |
| 127 | + * hwlock1: hwspinlock-controller@... { |
| 128 | + * #hwlock-cells = <1>; |
| 129 | + * }; |
| 130 | + * |
| 131 | + * n: node { |
| 132 | + * hwlocks = <&hwlock1 1>, |
| 133 | + * <&hwlock1 6>; |
| 134 | + * }; |
| 135 | + * |
| 136 | + * Example usage: |
| 137 | + * |
| 138 | + * DT_HWSPINLOCK_ID_BY_IDX(DT_NODELABEL(n), 0) // 1 |
| 139 | + * DT_HWSPINLOCK_ID_BY_IDX(DT_NODELABEL(n), 1) // 6 |
| 140 | + * |
| 141 | + * @param node_id node identifier for a node with a hwlocks property |
| 142 | + * @param idx index of a hwlocks element in the hwlocks |
| 143 | + * |
| 144 | + * @return the channel value in the specifier at the named element or 0 if no |
| 145 | + * channels are supported |
| 146 | + * |
| 147 | + * @see DT_PHA_BY_IDX() |
| 148 | + */ |
| 149 | +#define DT_HWSPINLOCK_ID_BY_IDX(node_id, idx) \ |
| 150 | + DT_PHA_BY_IDX(node_id, hwlocks, idx, id) |
| 151 | + |
| 152 | +/** |
| 153 | + * @} |
| 154 | + */ |
| 155 | + |
| 156 | +#ifdef __cplusplus |
| 157 | +} |
| 158 | +#endif |
| 159 | + |
| 160 | +#endif /* ZEPHYR_INCLUDE_DEVICETREE_HWSPINLOCK_H_ */ |
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