soc: nrf: Add nRF54LM20A device

Adding nRF54LM20A device.

Signed-off-by: Karol Lasończyk <[email protected]>

Author: kl-cruz

dts/arm/nordic/nrf54lm20a_enga_cpuapp.dtsi

@@ -0,0 +1,125 @@
+/*
+ * Copyright (c) 2024 Nordic Semiconductor ASA
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ */
+
+#include <nordic/nrf54lm20a.dtsi>
+
+cpu: &cpuapp {};
+systick: &cpuapp_systick {};
+nvic: &cpuapp_nvic {};
+
+/delete-node/ &cpuflpr;
+/delete-node/ &cpuflpr_rram;
+/delete-node/ &cpuflpr_sram;
+/delete-node/ &cpuflpr_clic;
+
+/ {
+	chosen {
+		zephyr,entropy = &prng;
+	};
+
+	soc {
+		compatible = "simple-bus";
+		interrupt-parent = <&cpuapp_nvic>;
+		ranges;
+	};
+
+	psa_rng: psa-rng {
+		compatible = "zephyr,psa-crypto-rng";
+		status = "disabled";
+	};
+
+	prng: prng {
+		compatible = "nordic,entropy-prng";
+		status = "okay";
+	};
+};
+
+&cpuflpr_vpr {
+	cpuapp_vevif_rx: mailbox@1 {
+		compatible = "nordic,nrf-vevif-event-rx";
+		reg = <0x0 0x1000>;
+		status = "disabled";
+		interrupts = <76 NRF_DEFAULT_IRQ_PRIORITY>;
+		#mbox-cells = <1>;
+		nordic,events = <1>;
+		nordic,events-mask = <0x00100000>;
+	};
+
+	cpuapp_vevif_tx: mailbox@0 {
+		compatible = "nordic,nrf-vevif-task-tx";
+		reg = <0x0 0x1000>;
+		#mbox-cells = <1>;
+		nordic,tasks = <7>;
+		nordic,tasks-mask = <0x007f0000>;
+		status = "disabled";
+	};
+};
+
+&cpuapp_ppb {
+	compatible = "simple-bus";
+	ranges;
+};
+
+&grtc {
+	interrupts = <228 NRF_DEFAULT_IRQ_PRIORITY>,
+		     <229 NRF_DEFAULT_IRQ_PRIORITY>; /* reserved for Zero Latency IRQs */
+};
+
+&gpiote20 {
+	interrupts = <219 NRF_DEFAULT_IRQ_PRIORITY>;
+};
+
+&gpiote30 {
+	interrupts = <269 NRF_DEFAULT_IRQ_PRIORITY>;
+};
+
+&dppic00 {
+	status = "okay";
+};
+
+&dppic10 {
+	status = "okay";
+};
+
+&dppic20 {
+	status = "okay";
+};
+
+&dppic30 {
+	status = "okay";
+};
+
+&ppib00 {
+	status = "okay";
+};
+
+&ppib01 {
+	status = "okay";
+};
+
+&ppib10 {
+	status = "okay";
+};
+
+&ppib11 {
+	status = "okay";
+};
+
+&ppib20 {
+	status = "okay";
+};
+
+&ppib21 {
+	status = "okay";
+};
+
+&ppib22 {
+	status = "okay";
+};
+
+&ppib30 {
+	status = "okay";
+};

dts/riscv/nordic/nrf54lm20a_enga_cpuflpr.dtsi

@@ -0,0 +1,67 @@
+/*
+ * Copyright (c) 2025 Nordic Semiconductor ASA
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ */
+
+#include <nordic/nrf54lm20a.dtsi>
+
+cpu: &cpuflpr {};
+clic: &cpuflpr_clic {};
+
+/delete-node/ &cpuapp;
+/delete-node/ &cpuapp_rram;
+/delete-node/ &cpuapp_ppb;
+/delete-node/ &cpuapp_sram;
+
+/ {
+	soc {
+		compatible = "simple-bus";
+		interrupt-parent = <&cpuflpr_clic>;
+		ranges;
+	};
+};
+
+&cpuflpr {
+	cpuflpr_vevif_rx: mailbox {
+		compatible = "nordic,nrf-vevif-task-rx";
+		status = "disabled";
+		interrupt-parent = <&cpuflpr_clic>;
+		interrupts = <16 NRF_DEFAULT_IRQ_PRIORITY>,
+			     <17 NRF_DEFAULT_IRQ_PRIORITY>,
+			     <18 NRF_DEFAULT_IRQ_PRIORITY>,
+			     <19 NRF_DEFAULT_IRQ_PRIORITY>,
+			     <20 NRF_DEFAULT_IRQ_PRIORITY>,
+			     <21 NRF_DEFAULT_IRQ_PRIORITY>,
+			     <22 NRF_DEFAULT_IRQ_PRIORITY>;
+		#mbox-cells = <1>;
+		nordic,tasks = <7>;
+		nordic,tasks-mask = <0x007f0000>;
+	};
+};
+
+&cpuflpr_vpr {
+	cpuflpr_vevif_tx: mailbox {
+		compatible = "nordic,nrf-vevif-event-tx";
+		#mbox-cells = <1>;
+		nordic,events = <1>;
+		nordic,events-mask = <0x00100000>;
+		status = "disabled";
+	};
+};
+
+&cpuflpr_clic {
+	status = "okay";
+};
+
+&grtc {
+	interrupts = <226 NRF_DEFAULT_IRQ_PRIORITY>;
+};
+
+&gpiote20 {
+	interrupts = <218 NRF_DEFAULT_IRQ_PRIORITY>;
+};
+
+&gpiote30 {
+	interrupts = <268 NRF_DEFAULT_IRQ_PRIORITY>;
+};