arch: arm: mpu: Make XN bit conditional on CONFIG_XIP for RAM region

Make the execute never (XN) bit conditonal on CONFIG_XIP for the RAM MPU
region attribute. This is required because when CONFIG_XIP is not set,
the entire image will be linked into SRAM. In this case, SRAM must be
executable.

Signed-off-by: Daniel DeGrasse <[email protected]>

Author: danieldegrasse

include/zephyr/arch/arm/aarch32/mpu/arm_mpu_v7m.h

@@ -110,10 +110,15 @@
 #define REGION_4G       REGION_SIZE(4GB)
 
 /* Some helper defines for common regions */
+
+/* On Cortex-M, we can only set the XN bit when CONFIG_XIP=y. When
+ * CONFIG_XIP=n, the entire image will be linked to SRAM, so we need to keep
+ * the SRAM region XN bit clear or the application code will not be executable.
+ */
 #define REGION_RAM_ATTR(size) \
 { \
 	(NORMAL_OUTER_INNER_WRITE_BACK_WRITE_READ_ALLOCATE_NON_SHAREABLE | \
-	 MPU_RASR_XN_Msk | size | P_RW_U_NA_Msk) \
+	 IF_ENABLED(CONFIG_XIP, (MPU_RASR_XN_Msk |)) size | P_RW_U_NA_Msk) \
 }
 #define REGION_RAM_NOCACHE_ATTR(size) \
 { \

include/zephyr/arch/arm/aarch32/mpu/arm_mpu_v8.h

@@ -245,9 +245,14 @@
 		.r_limit = limit - 1,				      \
 	}
 #else
+
+/* On Cortex-M, we can only set the XN bit when CONFIG_XIP=y. When
+ * CONFIG_XIP=n, the entire image will be linked to SRAM, so we need to keep
+ * the SRAM region XN bit clear or the application code will not be executable.
+ */
 #define REGION_RAM_ATTR(base, size) \
 	{\
-		.rbar = NOT_EXEC | \
+		.rbar = IF_ENABLED(CONFIG_XIP, (NOT_EXEC |)) \
 			P_RW_U_NA_Msk | NON_SHAREABLE_Msk, /* AP, XN, SH */ \
 		/* Cache-ability */ \
 		.mair_idx = MPU_MAIR_INDEX_SRAM, \