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board: arm64: mimx8mp/n/m: fix cpu command in document
Fixed the wrong cpu command. Signed-off-by: Jiafei Pan <[email protected]>
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boards/arm64/mimx8mm_evk/doc/index.rst

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@@ -88,7 +88,7 @@ Or kick SMP zephyr.bin:
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.. code-block:: console
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mw 303d0518 f 1; fatload mmc 1:1 0x93c00000 zephyr.bin; dcache flush; icache flush; dcache off; icache off; cpu release 2 0x93c00000
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mw 303d0518 f 1; fatload mmc 1:1 0x93c00000 zephyr.bin; dcache flush; icache flush; dcache off; icache off; cpu 2 release 0x93c00000
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Use this configuration to run basic Zephyr applications and kernel tests,

boards/arm64/mimx8mn_evk/doc/index.rst

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@@ -88,7 +88,7 @@ Or kick SMP zephyr.bin:
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.. code-block:: console
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mw 303d0518 f 1; fatload mmc 1:1 0x93c00000 zephyr.bin; dcache flush; icache flush; dcache off; icache off; cpu release 2 0x93c00000
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mw 303d0518 f 1; fatload mmc 1:1 0x93c00000 zephyr.bin; dcache flush; icache flush; dcache off; icache off; cpu 2 release 0x93c00000
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Use this configuration to run basic Zephyr applications and kernel tests,

boards/arm64/mimx8mp_evk/doc/index.rst

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Original file line numberDiff line numberDiff line change
@@ -88,7 +88,7 @@ Or kick SMP zephyr.bin:
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.. code-block:: console
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mw 303d0518 f 1; fatload mmc 1:1 0xc0000000 zephyr.bin; dcache flush; icache flush; dcache off; icache off; cpu release 2 0xc0000000
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mw 303d0518 f 1; fatload mmc 1:1 0xc0000000 zephyr.bin; dcache flush; icache flush; dcache off; icache off; cpu 2 release 0xc0000000
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Use this configuration to run basic Zephyr applications and kernel tests,
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for example, with the :ref:`synchronization_sample`:

boards/arm64/mimx93_evk/doc/index.rst

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@@ -86,7 +86,7 @@ Use U-Boot to load and kick zephyr.bin to Cortex-A55 Core1:
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.. code-block:: console
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fatload mmc 1:1 0xc0000000 zephyr.bin; dcache flush; icache flush; dcache off; icache off; cpu release 1 0xc0000000
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fatload mmc 1:1 0xc0000000 zephyr.bin; dcache flush; icache flush; dcache off; icache off; cpu 1 release 0xc0000000
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Or use the following command to kick zephyr.bin to Cortex-A55 Core0:

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