11/*
2- * Copyright 2022, NXP
2+ * Copyright 2022,2024 NXP
33 *
44 * SPDX-License-Identifier: Apache-2.0
55 */
1111#include <fsl_clock.h>
1212#endif
1313
14+ /* IOCON register addresses. */
15+ static uint32_t volatile * iocon [] = {
16+ #if (DT_NODE_HAS_STATUS_OKAY (DT_NODELABEL (iocon )))
17+ (uint32_t * )DT_REG_ADDR (DT_NODELABEL (iocon )),
18+ #else
19+ NULL ,
20+ #endif
21+ #if (DT_NODE_HAS_STATUS_OKAY (DT_NODELABEL (iocon1 )))
22+ (uint32_t * )DT_REG_ADDR (DT_NODELABEL (iocon1 )),
23+ #else
24+ NULL ,
25+ #endif
26+ #if (DT_NODE_HAS_STATUS_OKAY (DT_NODELABEL (iocon2 )))
27+ (uint32_t * )DT_REG_ADDR (DT_NODELABEL (iocon2 )),
28+ #else
29+ NULL ,
30+ #endif
31+ };
32+
1433#define OFFSET (mux ) (((mux) & 0xFFF00000) >> 20)
1534#define TYPE (mux ) (((mux) & 0xC0000) >> 18)
35+ #define INDEX (mux ) (((mux) & 0x38000) >> 15)
1636
1737#define IOCON_TYPE_D 0x0
1838#define IOCON_TYPE_I 0x1
1939#define IOCON_TYPE_A 0x2
2040
21- static volatile uint32_t * iocon =
22- (volatile uint32_t * )DT_REG_ADDR (DT_NODELABEL (iocon ));
2341
24- int pinctrl_configure_pins (const pinctrl_soc_pin_t * pins , uint8_t pin_cnt ,
25- uintptr_t reg )
42+ int pinctrl_configure_pins (const pinctrl_soc_pin_t * pins , uint8_t pin_cnt , uintptr_t reg )
2643{
2744 for (uint8_t i = 0 ; i < pin_cnt ; i ++ ) {
2845 uint32_t pin_mux = pins [i ];
2946 uint32_t offset = OFFSET (pin_mux );
47+ uint8_t index = INDEX (pin_mux );
3048
3149 /* Check if this is an analog or i2c type pin */
3250 switch (TYPE (pin_mux )) {
@@ -44,7 +62,8 @@ int pinctrl_configure_pins(const pinctrl_soc_pin_t *pins, uint8_t pin_cnt,
4462 __ASSERT_NO_MSG (TYPE (pin_mux ) <= IOCON_TYPE_A );
4563 }
4664 /* Set pinmux */
47- * (iocon + offset ) = pin_mux ;
65+ * (iocon [index ] + offset ) = pin_mux ;
66+
4867 }
4968 return 0 ;
5069}
0 commit comments