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laneb-infineonDeepika-aerlyncsayoojkkarun
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samples: adc: Add PSOC4 board overlays
Add device tree overlays for ADC samples and tests on CY8CKIT-041S-MAX and CY8CPROTO-041TP boards. Configures ADC channels with pinctrl for analog inputs on available header pins. Includes single-ended and differential channel configurations demonstrating various ADC features. Added overlays for: - samples/drivers/adc/adc_dt - samples/drivers/adc/adc_sequence - tests/drivers/adc/adc_api - tests/drivers/adc/adc_error_cases Signed-off-by: Braeden Lane <[email protected]> Co-authored-by: Deepika R <[email protected]> Co-authored-by: Sayooj K Karun <[email protected]>
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‎samples/drivers/adc/adc_dt/boards/cy8ckit_041s_max.overlay‎

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/*
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* Copyright (c) 2025 Infineon Technologies AG,
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* or an affiliate of Infineon Technologies AG.
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*
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* SPDX-License-Identifier: Apache-2.0
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*/
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/*
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* ADC Channel Configuration for CY8CKIT-041S-MAX
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*
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* Test Setup:
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* - Connect 0.616V test voltage to specified pins
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* - Using internal 1.2V reference
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* - Tests SARMUX (direct GPIO) routing
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*
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* Physical Connections (Arduino headers):
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* - P2.2 (J2-5, A2): Connect to 0.616V (differential V+)
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* - P2.3 (J2-7, A3): Connect to GND (differential V-)
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* - P2.0 (J2-1, A0): Connect to 0.616V (single-ended)
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* - P2.4 (J3-1, A4): Connect to 0.616V (single-ended)
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*
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* Channel Pin(s) Routing Configuration Test Voltage
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* Channel 0 P2.2, P2.3 SARMUX 2/3 Differential V+=0.616V, V-=GND
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* Channel 1 P2.0 SARMUX 0 Single-ended 0.616V
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* Channel 2 P2.4 SARMUX 4 Single-ended 0.616V
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*/
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#include <zephyr/dt-bindings/adc/adc.h>
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#include <zephyr/dt-bindings/pinctrl/ifx_cat1-pinctrl.h>
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/ {
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zephyr,user {
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io-channels = <&adc0 0>, <&adc0 1>, <&adc0 2>;
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};
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};
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&pinctrl {
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p2_2_adc: p2_2_adc {
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pinmux = <DT_CAT1_PINMUX(2, 2, HSIOM_SEL_GPIO)>;
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};
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p2_3_adc: p2_3_adc {
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pinmux = <DT_CAT1_PINMUX(2, 3, HSIOM_SEL_GPIO)>;
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};
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p2_0_adc: p2_0_adc {
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pinmux = <DT_CAT1_PINMUX(2, 0, HSIOM_SEL_GPIO)>;
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};
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p2_4_adc: p2_4_adc {
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pinmux = <DT_CAT1_PINMUX(2, 4, HSIOM_SEL_GPIO)>;
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};
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};
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&adc0 {
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status = "okay";
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vref-src = "internal"; /* Use internal 1.2V reference */
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pinctrl-0 = <&p2_2_adc &p2_3_adc &p2_0_adc &p2_4_adc>;
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pinctrl-names = "default";
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#address-cells = <1>;
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#size-cells = <0>;
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channel@0 {
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reg = <0>;
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zephyr,gain = "ADC_GAIN_1";
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zephyr,differential;
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zephyr,reference = "ADC_REF_INTERNAL";
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zephyr,vref-mv = <1200>;
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zephyr,input-positive = <2>; /* SARMUX pin 2 = P2.2 (V+) */
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zephyr,input-negative = <3>; /* SARMUX pin 3 = P2.3 (V-) */
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zephyr,resolution = <12>;
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zephyr,oversampling = <0>;
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zephyr,acquisition-time = <ADC_ACQ_TIME_DEFAULT>;
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};
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channel@1 {
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reg = <1>;
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zephyr,gain = "ADC_GAIN_1";
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zephyr,reference = "ADC_REF_INTERNAL";
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zephyr,vref-mv = <1200>;
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zephyr,input-positive = <0>; /* SARMUX pin 0 = P2.0 */
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zephyr,resolution = <12>;
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zephyr,oversampling = <0>;
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zephyr,acquisition-time = <ADC_ACQ_TIME_DEFAULT>;
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};
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channel@2 {
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reg = <2>;
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zephyr,gain = "ADC_GAIN_1";
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zephyr,reference = "ADC_REF_INTERNAL";
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zephyr,vref-mv = <1200>;
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zephyr,input-positive = <4>; /* SARMUX pin 4 = P2.4 */
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zephyr,resolution = <12>;
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zephyr,oversampling = <0>;
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zephyr,acquisition-time = <ADC_ACQ_TIME_DEFAULT>;
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};
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};

‎samples/drivers/adc/adc_dt/boards/cy8cproto_041tp.overlay‎

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/*
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* Copyright (c) 2025 Infineon Technologies AG,
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* or an affiliate of Infineon Technologies AG.
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*
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* SPDX-License-Identifier: Apache-2.0
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*/
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/*
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* ADC Channel to GPIO Pin Mapping for Testing:
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*
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* Channel ADC Pin Routing Type GPIO Pin Test Pin (V+) Test Pin (V-)
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* Channel 0 0 SARMUX P2.0 P2.0 GND
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* Channel 1 2, 3 SARMUX (diff) P2.2 (V+), P2.3 (V-) P2.2 P2.3
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*/
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#include <zephyr/dt-bindings/adc/adc.h>
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#include <zephyr/dt-bindings/adc/infineon-psoc4-sar.h>
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#include <zephyr/dt-bindings/pinctrl/ifx_cat1-pinctrl.h>
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/ {
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zephyr,user {
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io-channels = <&adc0 0>, <&adc0 1>;
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};
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};
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&pinctrl {
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p2_0_adc: p2_0_adc {
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pinmux = <DT_CAT1_PINMUX(2, 0, HSIOM_SEL_GPIO)>;
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};
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p2_2_adc: p2_2_adc {
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pinmux = <DT_CAT1_PINMUX(2, 2, HSIOM_SEL_GPIO)>;
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};
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p2_3_adc: p2_3_adc {
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pinmux = <DT_CAT1_PINMUX(2, 3, HSIOM_SEL_GPIO)>;
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};
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};
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&adc0 {
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status = "okay";
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clocks = <&peri_clk_div4>;
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pinctrl-0 = <&p2_0_adc &p2_2_adc &p2_3_adc>;
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pinctrl-names = "default";
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#address-cells = <1>;
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#size-cells = <0>;
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channel@0 {
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reg = <0>;
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zephyr,gain = "ADC_GAIN_1";
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zephyr,reference = "ADC_REF_INTERNAL";
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zephyr,input-positive = <CY_SAR_ADDR_SARMUX_0>;
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zephyr,resolution = <12>;
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zephyr,oversampling = <8>;
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zephyr,acquisition-time = <ADC_ACQ_TIME_DEFAULT>;
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};
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channel@1 {
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reg = <1>;
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zephyr,gain = "ADC_GAIN_1";
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zephyr,differential;
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zephyr,reference = "ADC_REF_INTERNAL";
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zephyr,input-positive = <CY_SAR_ADDR_SARMUX_2>;
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zephyr,input-negative = <CY_SAR_ADDR_SARMUX_3>;
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zephyr,resolution = <12>;
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zephyr,oversampling = <0>;
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zephyr,acquisition-time = <ADC_ACQ_TIME_DEFAULT>;
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};
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};

‎samples/drivers/adc/adc_sequence/boards/cy8ckit_041s_max.overlay‎

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/*
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* Copyright (c) 2025 Infineon Technologies AG,
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* or an affiliate of Infineon Technologies AG.
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*
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* SPDX-License-Identifier: Apache-2.0
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*/
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/*
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* ADC Channel Configuration for adc_sequence Sample
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* This overlay configures multiple ADC channels for sequential sampling.
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*
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* Test Setup:
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* - Connect P2.0 to a test voltage (e.g., 3.3V or variable)
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* - Connect P2.2 and P2.3 for differential measurement
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* - Connect GND for reference
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*/
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#include <zephyr/dt-bindings/adc/adc.h>
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#include <zephyr/dt-bindings/pinctrl/ifx_cat1-pinctrl.h>
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/ {
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aliases {
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adc0 = &adc0;
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};
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};
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&pinctrl {
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p2_0_adc: p2_0_adc {
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pinmux = <DT_CAT1_PINMUX(2, 0, HSIOM_SEL_GPIO)>;
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};
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p2_2_adc: p2_2_adc {
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pinmux = <DT_CAT1_PINMUX(2, 2, HSIOM_SEL_GPIO)>;
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};
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p2_3_adc: p2_3_adc {
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pinmux = <DT_CAT1_PINMUX(2, 3, HSIOM_SEL_GPIO)>;
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};
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};
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&adc0 {
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status = "okay";
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vref-src = "internal"; /* Use internal 1.2V reference */
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pinctrl-0 = <&p2_0_adc &p2_2_adc &p2_3_adc>;
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pinctrl-names = "default";
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#address-cells = <1>;
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#size-cells = <0>;
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channel@0 {
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reg = <0>;
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zephyr,gain = "ADC_GAIN_1";
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zephyr,reference = "ADC_REF_INTERNAL";
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zephyr,vref-mv = <1200>;
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zephyr,input-positive = <0>; /* P2.0 - SARMUX direct */
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zephyr,resolution = <12>;
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zephyr,oversampling = <0>;
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zephyr,acquisition-time = <ADC_ACQ_TIME_DEFAULT>;
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};
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channel@1 {
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reg = <1>;
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zephyr,gain = "ADC_GAIN_1";
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zephyr,reference = "ADC_REF_INTERNAL";
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zephyr,vref-mv = <1200>;
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zephyr,differential;
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zephyr,input-positive = <2>; /* P2.2 */
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zephyr,input-negative = <3>; /* P2.3 */
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zephyr,resolution = <12>;
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zephyr,oversampling = <0>;
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zephyr,acquisition-time = <ADC_ACQ_TIME_DEFAULT>;
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};
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};

‎samples/drivers/adc/adc_sequence/boards/cy8cproto_041tp.overlay‎

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/*
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* Copyright (c) 2025 Infineon Technologies AG,
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* or an affiliate of Infineon Technologies AG.
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*
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* SPDX-License-Identifier: Apache-2.0
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*/
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#include <zephyr/dt-bindings/adc/adc.h>
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#include <zephyr/dt-bindings/adc/infineon-psoc4-sar.h>
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#include <zephyr/dt-bindings/pinctrl/ifx_cat1-pinctrl.h>
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/ {
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aliases {
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adc0 = &adc0;
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};
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};
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&pinctrl {
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/* ADC Channel 0: P2.0 */
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p2_0_adc: p2_0_adc {
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pinmux = <DT_CAT1_PINMUX(2, 0, HSIOM_SEL_GPIO)>;
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};
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/* ADC Channel 1: P2.2 (V+) */
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p2_2_adc: p2_2_adc {
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pinmux = <DT_CAT1_PINMUX(2, 2, HSIOM_SEL_GPIO)>;
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};
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/* ADC Channel 1: P2.3 (V-) */
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p2_3_adc: p2_3_adc {
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pinmux = <DT_CAT1_PINMUX(2, 3, HSIOM_SEL_GPIO)>;
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};
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};
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&adc0 {
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status = "okay";
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clocks = <&peri_clk_div4>;
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pinctrl-0 = <&p2_0_adc &p2_2_adc &p2_3_adc>;
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pinctrl-names = "default";
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#address-cells = <1>;
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#size-cells = <0>;
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/* Channel 0: Single-ended on P2.0 */
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channel@0 {
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reg = <0>;
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zephyr,gain = "ADC_GAIN_1";
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zephyr,reference = "ADC_REF_INTERNAL";
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zephyr,input-positive = <CY_SAR_ADDR_SARMUX_0>;
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zephyr,resolution = <12>;
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zephyr,oversampling = <0>;
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zephyr,acquisition-time = <ADC_ACQ_TIME_DEFAULT>;
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};
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/* Channel 1: Differential on P2.2 (+) and P2.3 (-) */
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channel@1 {
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reg = <1>;
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zephyr,gain = "ADC_GAIN_1";
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zephyr,reference = "ADC_REF_INTERNAL";
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zephyr,differential;
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zephyr,input-positive = <CY_SAR_ADDR_SARMUX_2>;
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zephyr,input-negative = <CY_SAR_ADDR_SARMUX_3>;
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zephyr,resolution = <12>;
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zephyr,oversampling = <0>;
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zephyr,acquisition-time = <ADC_ACQ_TIME_DEFAULT>;
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};
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};

‎tests/drivers/adc/adc_api/boards/cy8ckit_041s_max.overlay‎

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/*
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* Copyright (c) 2025 Infineon Technologies AG,
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* or an affiliate of Infineon Technologies AG.
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*
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* SPDX-License-Identifier: Apache-2.0
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*/
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/*
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* ADC Channel to GPIO Pin Mapping for Testing:
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*
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* Channel ADC Pin Routing Type GPIO Pin Test Pin (V+) Test Pin (V-)
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* Channel 0 0 SARMUX P2.0 P2.0 GND
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* Channel 1 2, 3 SARMUX (differential) P2.2 (V+), P2.3 (V-) P2.2 P2.3
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* Channel 2 4 SARMUX P2.4 P2.4 GND
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*/
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#include <zephyr/dt-bindings/adc/adc.h>
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#include <zephyr/dt-bindings/pinctrl/ifx_cat1-pinctrl.h>
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/ {
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zephyr,user {
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io-channels = <&adc0 0>, <&adc0 1>, <&adc0 2>;
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};
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};
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&pinctrl {
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p2_0_adc: p2_0_adc {
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pinmux = <DT_CAT1_PINMUX(2, 0, HSIOM_SEL_GPIO)>;
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};
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p2_2_adc: p2_2_adc {
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pinmux = <DT_CAT1_PINMUX(2, 2, HSIOM_SEL_GPIO)>;
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};
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p2_3_adc: p2_3_adc {
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pinmux = <DT_CAT1_PINMUX(2, 3, HSIOM_SEL_GPIO)>;
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};
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p2_4_adc: p2_4_adc {
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pinmux = <DT_CAT1_PINMUX(2, 4, HSIOM_SEL_GPIO)>;
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};
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};
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&adc0 {
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status = "okay";
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vref-src = "internal";
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pinctrl-0 = <&p2_0_adc &p2_2_adc &p2_3_adc &p2_4_adc>;
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pinctrl-names = "default";
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#address-cells = <1>;
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#size-cells = <0>;
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channel@0 {
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reg = <0>;
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zephyr,gain = "ADC_GAIN_1";
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zephyr,reference = "ADC_REF_INTERNAL";
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zephyr,vref-mv = <1200>;
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zephyr,input-positive = <0>;
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zephyr,resolution = <12>;
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zephyr,oversampling = <8>;
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zephyr,acquisition-time = <ADC_ACQ_TIME_DEFAULT>;
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};
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channel@1 {
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reg = <1>;
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zephyr,gain = "ADC_GAIN_1";
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zephyr,differential;
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zephyr,reference = "ADC_REF_INTERNAL";
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zephyr,vref-mv = <1200>;
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zephyr,input-positive = <2>;
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zephyr,input-negative = <3>;
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zephyr,resolution = <12>;
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zephyr,oversampling = <0>;
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zephyr,acquisition-time = <ADC_ACQ_TIME_DEFAULT>;
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};
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channel@2 {
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reg = <2>;
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zephyr,gain = "ADC_GAIN_1";
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zephyr,reference = "ADC_REF_INTERNAL";
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zephyr,vref-mv = <1200>;
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zephyr,input-positive = <4>;
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zephyr,resolution = <12>;
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zephyr,oversampling = <8>;
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zephyr,acquisition-time = <ADC_ACQ_TIME_DEFAULT>;
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};
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};

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