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dts: Add CAN nodes for STM32H7 series
Each STM32H7 Series chip contains 2 or 3 FDCAN controllers. (https://www.st.com/en/microcontrollers-microprocessors/ stm32h7-series.html) Signed-off-by: Eug Krashtan <[email protected]>
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drivers/can/can_stm32fd.c

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@@ -49,10 +49,18 @@ int can_stm32fd_get_max_filters(const struct device *dev, enum can_ide id_type)
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void can_stm32fd_clock_enable(void)
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{
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/* There are different naming for clock source RCC_CCIPR_FDCANSEL_1
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* in files stm32h7xx_ll_rcc.h and stm32g4xx_ll_rcc.h
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*/
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#if defined(LL_RCC_FDCAN_CLKSOURCE_PLL2Q)
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LL_RCC_SetFDCANClockSource(LL_RCC_FDCAN_CLKSOURCE_PLL2Q);
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__HAL_RCC_FDCAN_CLK_ENABLE();
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#else
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LL_RCC_SetFDCANClockSource(LL_RCC_FDCAN_CLKSOURCE_PCLK1);
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__HAL_RCC_FDCAN_CLK_ENABLE();
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FDCAN_CONFIG->CKDIV = CONFIG_CAN_STM32_CLOCK_DIVISOR >> 1;
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#endif
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}
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void can_stm32fd_register_state_change_isr(const struct device *dev,

dts/arm/st/h7/stm32h7.dtsi

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@@ -444,6 +444,42 @@
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label = "SPI_6";
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};
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can {
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compatible = "bosch,m-can-base";
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#address-cells = <1>;
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#size-cells = <1>;
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std-filter-elements = <28>;
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ext-filter-elements = <8>;
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rx-fifo0-elements = <3>;
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rx-fifo1-elements = <3>;
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rx-buffer-elements = <0>;
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tx-buffer-elements = <3>;
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can1: can@40006400 {
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compatible = "st,stm32-fdcan";
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#address-cells = <1>;
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#size-cells = <0>;
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reg = <0x40006400 0x400>, <0x4000A400 0x350>;
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reg-names = "m_can", "message_ram";
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interrupts = <21 0>, <22 0>;
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interrupt-names = "LINE_0", "LINE_1";
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status = "disabled";
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label = "CAN_1";
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};
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can2: can@40006800 {
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compatible = "st,stm32-fdcan";
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#address-cells = <1>;
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#size-cells = <0>;
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reg = <0x40006800 0x400>, <0x4000A750 0x350>;
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reg-names = "m_can", "message_ram";
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interrupts = <86 0>, <87 0>;
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interrupt-names = "LINE_0", "LINE_1";
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status = "disabled";
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label = "CAN_2";
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};
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};
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timers1: timers@40010000 {
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compatible = "st,stm32-timers";
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reg = <0x40010000 0x400>;

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