soc: intel_adsp/ace30: do not map 0x0

dcpleung · kartben · commit 3d3ffa2c059d · 2024-11-25T08:30:57.000+01:00
The MMU mapping in SoC covers 0x0 which prevents catching NULL
pointer accesses. Since there are no hardware registers at
the very first page of memory, we move the starting point one
page later.

Signed-off-by: Daniel Leung &lt;daniel.leung@intel.com&gt;
diff --git a/soc/intel/intel_adsp/ace/mmu_ace30.c b/soc/intel/intel_adsp/ace/mmu_ace30.c
@@ -126,7 +126,7 @@ const struct xtensa_mmu_range xtensa_soc_mmu_ranges[] = {
 	},
 	{
 		/* FIXME: definitely need more refinements... */
-		.start = (uint32_t)0x0,
+		.start = (uint32_t)0x1000,
 		.end   = (uint32_t)0x100000,
 		.attrs = XTENSA_MMU_PERM_W,
 		.name = "hwreg0",

Original file line number	Diff line number	Diff line change
`@@ -126,7 +126,7 @@ const struct xtensa_mmu_range xtensa_soc_mmu_ranges[] = {`
`126`	`126`	`},`
`127`	`127`	`{`
`128`	`128`	`/* FIXME: definitely need more refinements... */`
`129`		`- .start = (uint32_t)0x0,`
	`129`	`+ .start = (uint32_t)0x1000,`
`130`	`130`	`.end = (uint32_t)0x100000,`
`131`	`131`	`.attrs = XTENSA_MMU_PERM_W,`
`132`	`132`	`.name = "hwreg0",`