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doc: posix arch: Fix trivial typos
Fix some trivial typos in the native POSIX architecture documentation. Signed-off-by: Oyvind Roti <[email protected]>
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boards/posix/doc/arch_soc.rst

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@@ -26,7 +26,7 @@ target hardware in the early phases of development.
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The POSIX architecture is not related and should not be confused with the
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:ref:`POSIX OS abstraction<posix_support>`.
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The later provides an adapatation shim that enables running applications
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The latter provides an adaptation shim that enables running applications
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which require POSIX APIs on Zephyr.
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@@ -350,10 +350,10 @@ and this thread will check what is the next
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scheduled HW event, advance simulated time until that point, and call the
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corresponding HW model event function.
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Eventually one of these HW models will raise an interrupt to the simulated CPU.
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When the IRQ controller wants to wake the simulated CPU, the HW thread is
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blocked, and the simulated CPU is awaken by letting the last SW thread continue
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executing.
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Eventually one of these HW models will raise an interrupt to the
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simulated CPU. When the IRQ controller wants to wake the simulated
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CPU, the HW thread is blocked, and the simulated CPU is awakened by
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letting the last SW thread continue executing.
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This process of getting the CPU to sleep, letting the HW models run,
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and raising an interrupt which wake the CPU again is repeated until the end

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