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smalaesmalae
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drivers: gpio: silabs-siwx91x: Refactor config structures
Drop usage of `pcfg` and `pdata` in favor of unified `cfg` for common configuration and `port_cfg`, `port_data` for port-specific configurations. Signed-off-by: Sai Santhosh Malae <[email protected]>
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+60
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‎drivers/gpio/gpio_silabs_siwx91x.c‎

Lines changed: 60 additions & 57 deletions
Original file line numberDiff line numberDiff line change
@@ -71,10 +71,10 @@ struct gpio_siwx91x_port_data {
7171
/* Functions */
7272
static int gpio_siwx91x_pin_configure(const struct device *dev, gpio_pin_t pin, gpio_flags_t flags)
7373
{
74-
const struct gpio_siwx91x_port_config *cfg = dev->config;
74+
const struct gpio_siwx91x_port_config *port_cfg = dev->config;
7575
struct gpio_siwx91x_port_data *port_data = dev->data;
76-
const struct device *parent = cfg->parent;
77-
const struct gpio_siwx91x_common_config *pcfg = parent->config;
76+
const struct device *parent = port_cfg->parent;
77+
const struct gpio_siwx91x_common_config *cfg = parent->config;
7878
uint8_t cur_cfg_pin = 0;
7979
sl_status_t status;
8080
int i;
@@ -84,11 +84,12 @@ static int gpio_siwx91x_pin_configure(const struct device *dev, gpio_pin_t pin,
8484
return -ENOTSUP;
8585
}
8686

87-
uint8_t pad = cfg->pads[pin];
87+
uint8_t pad = port_cfg->pads[pin];
8888

8989
if (pad == 0) {
9090
/* Enable MCU pad */
91-
status = sl_si91x_gpio_driver_enable_host_pad_selection((cfg->hal_port << 4) | pin);
91+
status = sl_si91x_gpio_driver_enable_host_pad_selection((port_cfg->hal_port << 4) |
92+
pin);
9293
if (status != SL_STATUS_OK) {
9394
return -ENODEV;
9495
}
@@ -105,36 +106,36 @@ static int gpio_siwx91x_pin_configure(const struct device *dev, gpio_pin_t pin,
105106
} else if (flags & GPIO_PULL_DOWN) {
106107
disable_state = GPIO_PULLDOWN;
107108
}
108-
if (cfg->ulp) {
109+
if (port_cfg->ulp) {
109110
sl_si91x_gpio_select_ulp_pad_driver_disable_state(pin, disable_state);
110111
} else {
111-
sl_si91x_gpio_select_pad_driver_disable_state((cfg->port << 4) | pin,
112+
sl_si91x_gpio_select_pad_driver_disable_state((port_cfg->port << 4) | pin,
112113
disable_state);
113114
}
114115

115116
if (flags & GPIO_INPUT) {
116-
if (cfg->ulp) {
117+
if (port_cfg->ulp) {
117118
sl_si91x_gpio_driver_enable_ulp_pad_receiver(pin);
118119
} else {
119-
sl_si91x_gpio_driver_enable_pad_receiver((cfg->port << 4) | pin);
120+
sl_si91x_gpio_driver_enable_pad_receiver((port_cfg->port << 4) | pin);
120121
}
121122
} else {
122-
if (cfg->ulp) {
123+
if (port_cfg->ulp) {
123124
sl_si91x_gpio_driver_disable_ulp_pad_receiver(pin);
124125
} else {
125-
sl_si91x_gpio_driver_disable_pad_receiver((cfg->port << 4) | pin);
126+
sl_si91x_gpio_driver_disable_pad_receiver((port_cfg->port << 4) | pin);
126127
}
127128
}
128129

129-
pcfg->reg->PIN_CONFIG[(cfg->port << 4) + pin].GPIO_CONFIG_REG_b.MODE = 0;
130+
cfg->reg->PIN_CONFIG[(port_cfg->port << 4) + pin].GPIO_CONFIG_REG_b.MODE = 0;
130131

131132
if (flags & GPIO_OUTPUT_INIT_HIGH) {
132-
sl_gpio_set_pin_output(cfg->hal_port, pin);
133+
sl_gpio_set_pin_output(port_cfg->hal_port, pin);
133134
} else if (flags & GPIO_OUTPUT_INIT_LOW) {
134-
sl_gpio_clear_pin_output(cfg->hal_port, pin);
135+
sl_gpio_clear_pin_output(port_cfg->hal_port, pin);
135136
}
136137

137-
sl_si91x_gpio_set_pin_direction(cfg->hal_port, pin, (flags & GPIO_OUTPUT) ? 0 : 1);
138+
sl_si91x_gpio_set_pin_direction(port_cfg->hal_port, pin, (flags & GPIO_OUTPUT) ? 0 : 1);
138139

139140
for (i = 0; i < port_data->next_pin; i++) {
140141
if (port_data->pin_config_info[i].pin == pin) {
@@ -148,7 +149,7 @@ static int gpio_siwx91x_pin_configure(const struct device *dev, gpio_pin_t pin,
148149
port_data->next_pin++;
149150
}
150151

151-
if (cur_cfg_pin < __builtin_popcount(cfg->common.port_pin_mask)) {
152+
if (cur_cfg_pin < __builtin_popcount(port_cfg->common.port_pin_mask)) {
152153
port_data->pin_config_info[cur_cfg_pin].port_dev = dev;
153154
port_data->pin_config_info[cur_cfg_pin].pin = pin;
154155
port_data->pin_config_info[cur_cfg_pin].flags = flags;
@@ -202,50 +203,50 @@ static int gpio_siwx91x_pm_action(const struct device *dev, enum pm_device_actio
202203

203204
static int gpio_siwx91x_port_get(const struct device *port, gpio_port_value_t *value)
204205
{
205-
const struct gpio_siwx91x_port_config *cfg = port->config;
206+
const struct gpio_siwx91x_port_config *port_cfg = port->config;
206207

207-
*value = sl_gpio_get_port_input(cfg->hal_port);
208+
*value = sl_gpio_get_port_input(port_cfg->hal_port);
208209

209210
return 0;
210211
}
211212

212213
static int gpio_siwx91x_port_set_masked(const struct device *port, gpio_port_pins_t mask,
213214
gpio_port_value_t value)
214215
{
215-
const struct gpio_siwx91x_port_config *cfg = port->config;
216-
const struct device *parent = cfg->parent;
217-
const struct gpio_siwx91x_common_config *pcfg = parent->config;
216+
const struct gpio_siwx91x_port_config *port_cfg = port->config;
217+
const struct device *parent = port_cfg->parent;
218+
const struct gpio_siwx91x_common_config *cfg = parent->config;
218219

219220
/* Cannot use HAL function sl_gpio_set_port_output_value(), as it doesn't clear bits. */
220-
pcfg->reg->PORT_CONFIG[cfg->port].PORT_LOAD_REG =
221-
(pcfg->reg->PORT_CONFIG[cfg->port].PORT_LOAD_REG & ~mask) | (value & mask);
221+
cfg->reg->PORT_CONFIG[port_cfg->port].PORT_LOAD_REG =
222+
(cfg->reg->PORT_CONFIG[port_cfg->port].PORT_LOAD_REG & ~mask) | (value & mask);
222223

223224
return 0;
224225
}
225226

226227
static int gpio_siwx91x_port_set_bits(const struct device *port, gpio_port_pins_t pins)
227228
{
228-
const struct gpio_siwx91x_port_config *cfg = port->config;
229+
const struct gpio_siwx91x_port_config *port_cfg = port->config;
229230

230-
sl_gpio_set_port_output(cfg->hal_port, pins);
231+
sl_gpio_set_port_output(port_cfg->hal_port, pins);
231232

232233
return 0;
233234
}
234235

235236
static int gpio_siwx91x_port_clear_bits(const struct device *port, gpio_port_pins_t pins)
236237
{
237-
const struct gpio_siwx91x_port_config *cfg = port->config;
238+
const struct gpio_siwx91x_port_config *port_cfg = port->config;
238239

239-
sl_gpio_clear_port_output(cfg->hal_port, pins);
240+
sl_gpio_clear_port_output(port_cfg->hal_port, pins);
240241

241242
return 0;
242243
}
243244

244245
static int gpio_siwx91x_port_toggle_bits(const struct device *port, gpio_port_pins_t pins)
245246
{
246-
const struct gpio_siwx91x_port_config *cfg = port->config;
247+
const struct gpio_siwx91x_port_config *port_cfg = port->config;
247248

248-
sl_gpio_toggle_port_output(cfg->hal_port, pins);
249+
sl_gpio_toggle_port_output(port_cfg->hal_port, pins);
249250

250251
return 0;
251252
}
@@ -262,7 +263,7 @@ static bool receiver_enabled(bool ulp, sl_gpio_port_t port, int pin)
262263
int gpio_siwx91x_port_get_direction(const struct device *port, gpio_port_pins_t map,
263264
gpio_port_pins_t *inputs, gpio_port_pins_t *outputs)
264265
{
265-
const struct gpio_siwx91x_port_config *cfg = port->config;
266+
const struct gpio_siwx91x_port_config *port_cfg = port->config;
266267

267268
if (inputs != NULL) {
268269
*inputs = 0;
@@ -272,12 +273,12 @@ int gpio_siwx91x_port_get_direction(const struct device *port, gpio_port_pins_t
272273
}
273274
for (int i = 0; i < MAX_PIN_COUNT; i++) {
274275
if ((map & BIT(i))) {
275-
if (sl_si91x_gpio_get_pin_direction(cfg->hal_port, i) == 0) {
276+
if (sl_si91x_gpio_get_pin_direction(port_cfg->hal_port, i) == 0) {
276277
if (outputs != NULL) {
277278
*outputs |= BIT(i);
278279
}
279280
}
280-
if (receiver_enabled(cfg->ulp, cfg->port, i)) {
281+
if (receiver_enabled(port_cfg->ulp, port_cfg->port, i)) {
281282
if (inputs != NULL) {
282283
*inputs |= BIT(i);
283284
}
@@ -290,33 +291,33 @@ int gpio_siwx91x_port_get_direction(const struct device *port, gpio_port_pins_t
290291
static int gpio_siwx91x_manage_callback(const struct device *port, struct gpio_callback *callback,
291292
bool set)
292293
{
293-
struct gpio_siwx91x_port_data *data = port->data;
294+
struct gpio_siwx91x_port_data *port_data = port->data;
294295

295-
return gpio_manage_callback(&data->callbacks, callback, set);
296+
return gpio_manage_callback(&port_data->callbacks, callback, set);
296297
}
297298

298299
static int gpio_siwx91x_interrupt_configure(const struct device *port, gpio_pin_t pin,
299300
enum gpio_int_mode mode, enum gpio_int_trig trig)
300301
{
301-
const struct gpio_siwx91x_port_config *cfg = port->config;
302-
const struct device *parent = cfg->parent;
303-
const struct gpio_siwx91x_common_config *pcfg = parent->config;
302+
const struct gpio_siwx91x_port_config *port_cfg = port->config;
303+
const struct device *parent = port_cfg->parent;
304+
const struct gpio_siwx91x_common_config *cfg = parent->config;
304305
struct gpio_siwx91x_common_data *data = parent->data;
305306
sl_si91x_gpio_interrupt_config_flag_t flags = 0;
306307

307308
if (mode & GPIO_INT_DISABLE) {
308309
ARRAY_FOR_EACH(data->interrupts, i) {
309-
if (data->interrupts[i].port == cfg->port &&
310+
if (data->interrupts[i].port == port_cfg->port &&
310311
data->interrupts[i].pin == pin) {
311312
data->interrupts[i].port = INVALID_PORT;
312-
if (cfg->ulp) {
313+
if (port_cfg->ulp) {
313314
sl_si91x_gpio_configure_ulp_pin_interrupt(i, flags, pin);
314315
} else {
315-
sl_gpio_configure_interrupt(cfg->port, pin, i, flags);
316+
sl_gpio_configure_interrupt(port_cfg->port, pin, i, flags);
316317
}
317318
/* Configure function doesn't mask interrupts when disabling */
318-
pcfg->reg->INTR[i].GPIO_INTR_CTRL_b.MASK = 1;
319-
if (cfg->ulp) {
319+
cfg->reg->INTR[i].GPIO_INTR_CTRL_b.MASK = 1;
320+
if (port_cfg->ulp) {
320321
sl_si91x_gpio_clear_ulp_interrupt(i);
321322
} else {
322323
sl_gpio_clear_interrupts(i);
@@ -343,14 +344,15 @@ static int gpio_siwx91x_interrupt_configure(const struct device *port, gpio_pin_
343344

344345
ARRAY_FOR_EACH(data->interrupts, i) {
345346
if (data->interrupts[i].port == INVALID_PORT ||
346-
(data->interrupts[i].port == cfg->port && data->interrupts[i].pin == pin)) {
347-
data->interrupts[i].port = cfg->port;
347+
(data->interrupts[i].port == port_cfg->port &&
348+
data->interrupts[i].pin == pin)) {
349+
data->interrupts[i].port = port_cfg->port;
348350
data->interrupts[i].pin = pin;
349351

350-
if (cfg->ulp) {
352+
if (port_cfg->ulp) {
351353
sl_si91x_gpio_configure_ulp_pin_interrupt(i, flags, pin);
352354
} else {
353-
sl_gpio_configure_interrupt(cfg->port, pin, i, flags);
355+
sl_gpio_configure_interrupt(port_cfg->port, pin, i, flags);
354356
}
355357
return 0;
356358
}
@@ -375,34 +377,35 @@ static inline int gpio_siwx91x_init_port(const struct device *port)
375377

376378
static void gpio_siwx91x_isr(const struct device *parent)
377379
{
378-
const struct gpio_siwx91x_common_config *pcfg = parent->config;
380+
const struct gpio_siwx91x_common_config *cfg = parent->config;
379381
struct gpio_siwx91x_common_data *common = parent->data;
380382
const struct device *port;
381-
struct gpio_siwx91x_port_data *data;
383+
struct gpio_siwx91x_port_data *port_data;
382384

383385
ARRAY_FOR_EACH(common->interrupts, i) {
384386
sl_gpio_port_t port_no = common->interrupts[i].port;
385-
uint32_t pending = pcfg->reg->INTR[i].GPIO_INTR_STATUS_b.INTERRUPT_STATUS;
387+
uint32_t pending = cfg->reg->INTR[i].GPIO_INTR_STATUS_b.INTERRUPT_STATUS;
386388

387389
if (pending && port_no != INVALID_PORT) {
388390
/* Clear interrupt */
389-
pcfg->reg->INTR[i].GPIO_INTR_STATUS_b.INTERRUPT_STATUS = 1;
391+
cfg->reg->INTR[i].GPIO_INTR_STATUS_b.INTERRUPT_STATUS = 1;
390392
port = common->ports[port_no];
391-
data = port->data;
392-
gpio_fire_callbacks(&data->callbacks, port, BIT(common->interrupts[i].pin));
393+
port_data = port->data;
394+
gpio_fire_callbacks(&port_data->callbacks, port,
395+
BIT(common->interrupts[i].pin));
393396
}
394397
}
395398
}
396399

397400
static uint32_t gpio_siwx91x_get_pending_int(const struct device *port)
398401
{
399-
const struct gpio_siwx91x_port_config *cfg = port->config;
400-
const struct device *parent = cfg->parent;
401-
const struct gpio_siwx91x_common_config *pcfg = parent->config;
402+
const struct gpio_siwx91x_port_config *port_cfg = port->config;
403+
const struct device *parent = port_cfg->parent;
404+
const struct gpio_siwx91x_common_config *cfg = parent->config;
402405
uint32_t status = 0;
403406

404-
ARRAY_FOR_EACH(pcfg->reg->INTR, i) {
405-
if (pcfg->reg->INTR[i].GPIO_INTR_STATUS_b.INTERRUPT_STATUS) {
407+
ARRAY_FOR_EACH(cfg->reg->INTR, i) {
408+
if (cfg->reg->INTR[i].GPIO_INTR_STATUS_b.INTERRUPT_STATUS) {
406409
status |= BIT(i);
407410
}
408411
}

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