drivers: spi: spi_context: exclude gpio code if no gpio cs

exclude gpio code if no gpio cs are used
for that spi driver.

Signed-off-by: Fin Maaß <[email protected]>

Author: maass-hamburg

drivers/spi/spi_context.h

@@ -21,6 +21,10 @@
 extern "C" {
 #endif
 
+#if defined(DT_DRV_COMPAT) && !DT_ANY_INST_HAS_PROP_STATUS_OKAY(cs_gpios)
+#define DT_SPI_CTX_HAS_NO_CS_GPIOS 1
+#endif
+
 enum spi_ctx_runtime_op_mode {
 	SPI_CTX_RUNTIME_OP_MODE_MASTER = BIT(0),
 	SPI_CTX_RUNTIME_OP_MODE_SLAVE  = BIT(1),
@@ -31,8 +35,10 @@ struct spi_context {
 #ifdef CONFIG_MULTITHREADING
 	const struct spi_config *owner;
 #endif
+#ifndef DT_SPI_CTX_HAS_NO_CS_GPIOS
 	const struct gpio_dt_spec *cs_gpios;
 	size_t num_cs_gpios;
+#endif /* !DT_SPI_CTX_HAS_NO_CS_GPIOS */
 
 #ifdef CONFIG_MULTITHREADING
 	struct k_sem lock;
@@ -71,6 +77,7 @@ struct spi_context {
 #define SPI_CONTEXT_INIT_SYNC(_data, _ctx_name)				\
 	._ctx_name.sync = Z_SEM_INITIALIZER(_data._ctx_name.sync, 0, 1)
 
+#ifndef DT_SPI_CTX_HAS_NO_CS_GPIOS
 #define SPI_CONTEXT_CS_GPIO_SPEC_ELEM(_node_id, _prop, _idx)		\
 	GPIO_DT_SPEC_GET_BY_IDX(_node_id, _prop, _idx),
 
@@ -84,6 +91,9 @@ struct spi_context {
 			    (SPI_CONTEXT_CS_GPIOS_FOREACH_ELEM(_node_id)), ({0}))	\
 	},										\
 	._ctx_name.num_cs_gpios = DT_PROP_LEN_OR(_node_id, cs_gpios, 0),
+#else /* DT_SPI_CTX_HAS_NO_CS_GPIOS */
+#define SPI_CONTEXT_CS_GPIOS_INITIALIZE(...)
+#endif /* DT_SPI_CTX_HAS_NO_CS_GPIOS */
 
 /*
  * Checks if a spi config is the same as the one stored in the spi_context
@@ -292,6 +302,13 @@ static inline void spi_context_complete(struct spi_context *ctx,
 #endif /* CONFIG_SPI_ASYNC */
 }
 
+#ifdef DT_SPI_CTX_HAS_NO_CS_GPIOS
+#define spi_context_cs_configure_all(...) 0
+#define spi_context_cs_get_all(...) 0
+#define spi_context_cs_put_all(...) 0
+#define _spi_context_cs_control(...) (void) 0
+#define spi_context_cs_control(...) (void) 0
+#else /* DT_SPI_CTX_HAS_NO_CS_GPIOS */
 /*
  * This function initializes all the chip select GPIOs associated with a spi controller.
  * The context first must be initialized using the SPI_CONTEXT_CS_GPIOS_INITIALIZE macro.
@@ -391,12 +408,13 @@ static inline void spi_context_cs_control(struct spi_context *ctx, bool on)
 {
 	_spi_context_cs_control(ctx, on, false);
 }
+#endif /* DT_SPI_CTX_HAS_NO_CS_GPIOS */
 
 /* Forcefully releases the spi context and removes the owner, allowing taking the lock
  * with spi_context_lock without the previous owner releasing the lock.
  * This is usually used to aid in implementation of the spi_release driver API.
  */
-static inline void spi_context_unlock_unconditionally(struct spi_context *ctx)
+static inline void spi_context_unlock_unconditionally(struct spi_context *ctx __maybe_unused)
 {
 	/* Forcing CS to go to inactive status */
 	_spi_context_cs_control(ctx, false, true);

drivers/spi/spi_esp32_spim.c

@@ -37,7 +37,7 @@ static bool spi_esp32_transfer_ongoing(struct spi_esp32_data *data)
 }
 
 static inline void spi_esp32_complete(const struct device *dev,
-				      struct spi_esp32_data *data,
+				      struct spi_esp32_data *data __maybe_unused,
 				      spi_dev_t *spi, int status)
 {
 #ifdef CONFIG_SPI_ESP32_INTERRUPT
@@ -177,7 +177,7 @@ static int IRAM_ATTR spi_esp32_transfer(const struct device *dev)
 
 	/* keep cs line active until last transmission */
 	hal_trans->cs_keep_active =
-		(!ctx->num_cs_gpios &&
+		(UTIL_OR(IS_ENABLED(DT_SPI_CTX_HAS_NO_CS_GPIOS), (ctx->num_cs_gpios == 0)) &&
 		 (ctx->rx_count > 1 || ctx->tx_count > 1 || ctx->rx_len > transfer_len_frames ||
 		  ctx->tx_len > transfer_len_frames));
 
@@ -488,9 +488,10 @@ static int IRAM_ATTR spi_esp32_configure(const struct device *dev,
 	 * Workaround for ESP32S3 and ESP32Cx SoC's. This dummy transaction is needed
 	 * to sync CLK and software controlled CS when SPI is in mode 3
 	 */
-#if defined(CONFIG_SOC_SERIES_ESP32S3) || defined(CONFIG_SOC_SERIES_ESP32C2) ||                    \
-	defined(CONFIG_SOC_SERIES_ESP32C3) || defined(CONFIG_SOC_SERIES_ESP32C6)
-	if (ctx->num_cs_gpios && (hal_dev->mode & (SPI_MODE_CPOL | SPI_MODE_CPHA))) {
+#if (defined(CONFIG_SOC_SERIES_ESP32S3) || defined(CONFIG_SOC_SERIES_ESP32C2) ||                   \
+	defined(CONFIG_SOC_SERIES_ESP32C3) || defined(CONFIG_SOC_SERIES_ESP32C6)) &&               \
+	!defined(DT_SPI_CTX_HAS_NO_CS_GPIOS)
+	if ((ctx->num_cs_gpios != 0) && (hal_dev->mode & (SPI_MODE_CPOL | SPI_MODE_CPHA))) {
 		spi_esp32_transfer(dev);
 	}
 #endif

drivers/spi/spi_ll_stm32.c

@@ -468,9 +468,9 @@ static int spi_stm32_shift_frames(const struct spi_stm32_config *cfg,
 	return spi_stm32_get_err(cfg->spi);
 }
 
-static void spi_stm32_cs_control(const struct device *dev, bool on)
+static void spi_stm32_cs_control(const struct device *dev, bool on __maybe_unused)
 {
-	struct spi_stm32_data *data = dev->data;
+	__maybe_unused struct spi_stm32_data *data = dev->data;
 
 	spi_context_cs_control(&data->ctx, on);
 

drivers/spi/spi_numaker.c

@@ -129,7 +129,7 @@ static int spi_numaker_configure(const struct device *dev, const struct spi_conf
 	/* Enable the automatic hardware slave select function. Select the SS pin and configure as
 	 * low-active.
 	 */
-	if (data->ctx.num_cs_gpios == 0) {
+	if (UTIL_OR(IS_ENABLED(DT_SPI_CTX_HAS_NO_CS_GPIOS), (data->ctx.num_cs_gpios == 0))) {
 		SPI_EnableAutoSS(dev_cfg->spi, SPI_SS, SPI_SS_ACTIVE_LOW);
 	} else {
 		SPI_DisableAutoSS(dev_cfg->spi);