boards: m5stack: cores3: Add mbus and grove connector

Adding M-Bus and Grove connector and also add configuration
for related peripherals.

Signed-off-by: TOKITA Hiroshi <[email protected]>

Author: soburi

boards/m5stack/m5stack_cores3/grove_connectors.dtsi

@@ -0,0 +1,18 @@
+/*
+ * Copyright (c) 2024 TOKITA Hiroshi
+ * SPDX-License-Identifier: Apache-2.0
+ */
+
+/ {
+	grove_header: grove_header {
+		compatible = "grove-header";
+		#gpio-cells = <2>;
+		gpio-map-mask = <0xffffffff 0xffffffc0>;
+		gpio-map-pass-thru = <0 0x3f>;
+		gpio-map = <0 0 &gpio0 1 0>,
+			   <1 0 &gpio0 2 0>;
+	};
+};
+
+grove_i2c: &i2c1 {};
+grove_uart: &uart2 {};

boards/m5stack/m5stack_cores3/m5stack_cores3-pinctrl.dtsi

@@ -20,6 +20,28 @@
 		};
 	};
 
+	uart1_default: uart1_default {
+		group1 {
+			pinmux = <UART1_TX_GPIO17>;
+			output-high;
+		};
+		group2 {
+			pinmux = <UART1_RX_GPIO18>;
+			bias-pull-up;
+		};
+	};
+
+	uart2_default: uart2_default {
+		group1 {
+			pinmux = <UART2_TX_GPIO2>;
+			output-high;
+		};
+		group2 {
+			pinmux = <UART2_RX_GPIO1>;
+			bias-pull-up;
+		};
+	};
+
 	spim2_default: spim2_default {
 		group1 {
 			pinmux = <SPIM2_MISO_GPIO35>,
@@ -40,4 +62,21 @@
 			output-high;
 		};
 	};
+
+	i2c1_default: i2c1_default {
+		group1 {
+			pinmux = <I2C1_SCL_GPIO1>,
+				 <I2C1_SDA_GPIO2>;
+			bias-pull-up;
+			drive-open-drain;
+			output-high;
+		};
+	};
+
+	twai_default: twai_default {
+		group1 {
+			pinmux = <TWAI_TX_GPIO7>,
+				 <TWAI_RX_GPIO6>;
+		};
+	};
 };

boards/m5stack/m5stack_cores3/m5stack_cores3_procpu_common.dtsi

@@ -7,6 +7,8 @@
 #include <espressif/esp32s3/esp32s3_wroom_n16r8.dtsi>
 #include <espressif/partitions_0x0_amp.dtsi>
 #include "m5stack_cores3-pinctrl.dtsi"
+#include "m5stack_mbus_connectors.dtsi"
+#include "grove_connectors.dtsi"
 
 / {
 	chosen {
@@ -19,7 +21,11 @@
 	};
 
 	aliases {
+		uart-0 = &uart0;
+		uart-1 = &uart1;
+		uart-2 = &uart2;
 		i2c-0 = &i2c0;
+		i2c-1 = &i2c1;
 		watchdog0 = &wdt0;
 	};
 };
@@ -35,25 +41,65 @@
 	pinctrl-names = "default";
 };
 
+&uart1 {
+	status = "okay";
+	current-speed = <115200>;
+	pinctrl-0 = <&uart1_default>;
+	pinctrl-names = "default";
+};
+
+&uart2 {
+	status = "disabled";
+	current-speed = <115200>;
+	pinctrl-0 = <&uart2_default>;
+	pinctrl-names = "default";
+};
+
+&gpio0 {
+	status = "okay";
+};
+
+&gpio1 {
+	status = "okay";
+};
+
 &i2c0 {
 	status = "okay";
 	clock-frequency = <I2C_BITRATE_STANDARD>;
 	pinctrl-0 = <&i2c0_default>;
 	pinctrl-names = "default";
 };
 
+&i2c1 {
+	status = "okay";
+	clock-frequency = <I2C_BITRATE_STANDARD>;
+	pinctrl-0 = <&i2c1_default>;
+	pinctrl-names = "default";
+};
+
 &spi2 {
+	status = "okay";
 	#address-cells = <1>;
 	#size-cells = <0>;
 	status = "okay";
 	pinctrl-0 = <&spim2_default>;
 	pinctrl-names = "default";
 };
 
+&twai {
+	status = "disabled";
+	pinctrl-0 = <&twai_default>;
+	pinctrl-names = "default";
+};
+
 &wdt0 {
 	status = "okay";
 };
 
+&trng0 {
+	status = "okay";
+};
+
 &esp32_bt_hci {
 	status = "okay";
 };

boards/m5stack/m5stack_cores3/m5stack_mbus_connectors.dtsi

@@ -0,0 +1,34 @@
+/*
+ * Copyright (c) 2024 TOKITA Hiroshi
+ * SPDX-License-Identifier: Apache-2.0
+ */
+
+/ {
+	m5stack_mbus_header: m5stack_mbus_connector {
+		compatible = "m5stack,mbus-header";
+		#gpio-cells = <2>;
+		gpio-map-mask = <0xffffffff 0xffffffc0>;
+		gpio-map-pass-thru = <0 0x3f>;
+		gpio-map = /*      GND */                    <1 0  &gpio 10 0>, /* ADC      */
+			   /*      GND */                    <3 0  &gpio  8 0>, /* PB_IN    */
+			   /*      GND */                                       /* RESET/EN */
+			   /*     MOSI */ <6 0  &gpio 37 0>, <7 0  &gpio  5 0>, /* GPIO     */
+			   /*     MISO */ <8 0  &gpio 35 0>, <9 0  &gpio  9 0>, /* PB_OUT   */
+			   /*      SCK */ <10 0 &gpio 36 0>,                    /* 3.3V     */
+			   /*     RXD0 */ <12 0 &gpio 44 0>, <13 0 &gpio 43 0>, /* TXD0     */
+			   /*    PC_RX */ <14 0 &gpio 18 0>, <15 0 &gpio 17 0>, /* PC_TX    */
+			   /*   intSDA */ <16 0 &gpio 12 0>, <17 0 &gpio 11 0>, /* intSCL   */
+			   /*   PA_SDA */ <18 0 &gpio  2 0>, <19 0 &gpio  1 0>, /* PA_SCL   */
+			   /*     GPIO */ <20 0 &gpio  6 0>, <21 0 &gpio  7 0>, /* GPIO     */
+			   /* I2S_DOUT */ <22 0 &gpio 13 0>, <23 0 &gpio  0 0>, /* I2S_LRCK */
+			   /*       NC */                    <25 0 &gpio  3 0>; /* I2S_DIN  */
+			   /*       NC */                                       /* 5V       */
+			   /*       NC */                                       /* BAT      */
+	};
+};
+
+m5stack_mbus_i2c0: &i2c0 {};
+m5stack_mbus_i2c1: &i2c1 {};
+m5stack_mbus_uart0: &uart0 {};
+m5stack_mbus_uart1: &uart1 {};
+m5stack_mbus_spi: &spi2 {};