dts: add fracn to STM32H7 PLL clocks

nono313 · nono313 · commit 412acce1e758 · 2024-09-09T09:15:12.000+02:00
add fracn to STM32H7 pll clock binding

Signed-off-by: Nathan Olff &lt;nathan@kickmaker.net&gt;
diff --git a/dts/bindings/clock/st,stm32h7-pll-clock.yaml b/dts/bindings/clock/st,stm32h7-pll-clock.yaml
@@ -65,3 +65,9 @@ properties:
     description: |
         PLL division factor for pllx_r_ck
         Valid range: 1 - 128
+
+  fracn:
+    type: int
+    description: |
+        PLLx FRACN value
+        Valid range: 0 - 8191
