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* SPDX-License-Identifier: Apache-2.0
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*/
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- #ifndef __MCXN_FLEXSPI_NOR_CONFIG__
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- #define __MCXN_FLEXSPI_NOR_CONFIG__
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+ #ifndef MCXN_FLEXSPI_NOR_CONFIG_
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+ #define MCXN_FLEXSPI_NOR_CONFIG_
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#include <stdint.h>
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#include <stdbool.h>
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/*! @brief Definitions for FlexSPI Serial Clock Frequency */
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typedef enum flexspi_serial_clock_freq {
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- flexspi_serial_clk_30mhz = 1 ,
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- flexspi_serial_clk_50mhz = 2 ,
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- flexspi_serial_clk_60mhz = 3 ,
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- flexspi_serial_clk_75mhz = 4 ,
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- flexspi_serial_clk_100mhz = 5 ,
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+ FLEXSPI_SERIAL_CLK_30MHZ = 1 ,
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+ FLEXSPI_SERIAL_CLK_50MHZ = 2 ,
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+ FLEXSPI_SERIAL_CLK_60MHZ = 3 ,
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+ FLEXSPI_SERIAL_CLK_75MHZ = 4 ,
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+ FLEXSPI_SERIAL_CLK_100MHZ = 5 ,
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} flexspi_serial_clk_freq_t ;
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/*! @brief FlexSPI clock configuration type */
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enum {
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/* Clock configure for SDR mode */
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- flexspi_clk_sdr ,
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+ FLEXSPI_CLK_SDR ,
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/* Clock configurat for DDR mode */
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- flexspi_clk_ddr ,
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+ FLEXSPI_CLK_DDR ,
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};
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/*! @brief FlexSPI Read Sample Clock Source definition */
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typedef enum flexspi_read_sample_clk_source {
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- flexspi_read_sample_clk_loopback_internally = 0 ,
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- flexspi_read_sample_clk_loopback_from_dqs_pad = 1 ,
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- flexspi_read_sample_clk_loopback_from_sck_pad = 2 ,
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- flexspi_read_sample_clk_external_input_from_dqs_pad = 3 ,
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+ FLEXSPI_READ_SAMPLE_CLK_LOOPBACK_INTERNALLY = 0 ,
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+ FLEXSPI_READ_SAMPLE_CLK_LOOPBACK_FROM_DQS_PAD = 1 ,
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+ FLEXSPI_READ_SAMPLE_CLK_LOOPBACK_FROM_SCK_PAD = 2 ,
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+ FLEXSPI_READ_SAMPLE_CLK_EXTERNAL_INPUT_FROM_DQS_PAD = 3 ,
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} flexspi_read_sample_clk_t ;
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/*! @brief Misc feature bit definitions */
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enum {
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/* Bit for Differential clock enable */
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- flexspi_misc_offset_diff_clk_enable = 0 ,
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+ FLEXSPI_MISC_OFFSET_DIFF_CLK_ENABLE = 0 ,
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/* Bit for CK2 enable */
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- flexspi_misc_offset_ck2_enable = 1 ,
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+ FLEXSPI_MISC_OFFSET_CK2_ENABLE = 1 ,
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/* Bit for Parallel mode enable */
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- flexspi_misc_offset_parallel_enable = 2 ,
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+ FLEXSPI_MISC_OFFSET_PARALLEL_ENABLE = 2 ,
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/* Bit for Word Addressable enable */
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- flexspi_misc_offset_word_addressable_enable = 3 ,
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+ FLEXSPI_MISC_OFFSET_WORD_ADDRESSABLE_ENABLE = 3 ,
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/* Bit for Safe Configuration Frequency enable */
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- flexspi_misc_offset_safe_config_freq_enable = 4 ,
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+ FLEXSPI_MISC_OFFSET_SAFE_CONFIG_FREQ_ENABLE = 4 ,
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/* Bit for Pad setting override enable */
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- flexspi_misc_offset_pad_setting_override_enable = 5 ,
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+ FLEXSPI_MISC_OFFSET_PAD_SETTING_OVERRIDE_ENABLE = 5 ,
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/* Bit for DDR clock confiuration indication. */
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- flexspi_misc_offset_ddr_mode_enable = 6 ,
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+ FLEXSPI_MISC_OFFSET_DDR_MODE_ENABLE = 6 ,
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};
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/*! @brief Flash Type Definition */
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enum {
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/* Flash devices are Serial NOR */
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- flexspi_device_type_serial_nor = 1 ,
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+ FLEXSPI_DEVICE_TYPE_SERIAL_NOR = 1 ,
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/* Flash devices are Serial NAND */
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- flexspi_device_type_serial_nand = 2 ,
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+ FLEXSPI_DEVICE_TYPE_SERIAL_NAND = 2 ,
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/* Flash devices are Serial RAM/HyperFLASH */
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- flexspi_device_type_serial_ram = 3 ,
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+ FLEXSPI_DEVICE_TYPE_SERIAL_RAM = 3 ,
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/* Flash device is MCP device, A1 is Serial NOR,
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* A2 is Serial NAND
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*/
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- flexspi_device_type_mcp_nor_nand = 0x12 ,
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+ FLEXSPI_DEVICE_TYPE_MCP_NOR_NAND = 0x12 ,
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/* Flash device is MCP device, A1 is Serial NOR,
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* A2 is Serial RAMs
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*/
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- flexspi_device_type_mcp_nor_ram = 0x13 ,
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+ FLEXSPI_DEVICE_TYPE_MCP_NOR_RAM = 0x13 ,
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};
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/*! @brief Flash Pad Definitions */
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enum {
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- serial_flash_1_pads = 1 ,
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- serial_flash_2_pads = 2 ,
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- serial_flash_4_pads = 4 ,
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- serial_flash_8_pads = 8 ,
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+ SERIAL_FLASH_1_PADS = 1 ,
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+ SERIAL_FLASH_2_PADS = 2 ,
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+ SERIAL_FLASH_4_PADS = 4 ,
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+ SERIAL_FLASH_8_PADS = 8 ,
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};
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/*! @brief FlexSPI LUT Sequence structure */
@@ -151,17 +151,17 @@ enum {
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/* Generic command, for example: configure dummy cycles,
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* drive strength, etc
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*/
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- device_config_cmd_type_generic ,
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+ DEVICE_CONFIG_CMD_TYPE_GENERIC ,
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/* Quad Enable command */
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- device_config_cmd_type_quad_enable ,
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+ DEVICE_CONFIG_CMD_TYPE_QUAD_ENABLE ,
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/* Switch from SPI to DPI/QPI/OPI mode */
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- device_config_cmd_type_spi2xpi ,
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+ DEVICE_CONFIG_CMD_TYPE_SPI2XPI ,
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/* Switch from DPI/QPI/OPI to SPI mode */
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- device_config_cmd_type_xpi2spi ,
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+ DEVICE_CONFIG_CMD_TYPE_XPI2SPI ,
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/* Switch to 0-4-4/0-8-8 mode */
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- device_config_cmd_type_spi2nocmd ,
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+ DEVICE_CONFIG_CMD_TYPE_SPI2NOCMD ,
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/* Reset device command */
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- device_config_cmd_type_reset ,
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+ DEVICE_CONFIG_CMD_TYPE_RESET ,
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};
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/*! @brief FlexSPI Memory Configuration Block */
@@ -380,4 +380,4 @@ extern "C" {
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#ifdef __cplusplus
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}
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#endif
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- #endif /* __MCXN_FLEXSPI_NOR_CONFIG__ */
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+ #endif /* MCXN_FLEXSPI_NOR_CONFIG_ */
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