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39 | 39 | hsiom: hsiom@40400000 { |
40 | 40 | compatible = "infineon,cat1-hsiom"; |
41 | 41 | reg = <0x40400000 0x4000>; |
42 | | - interrupts = <7 6>, <6 6>; |
| 42 | + interrupts = <7 4>, <6 4>; |
43 | 43 | status = "disabled"; |
44 | 44 | }; |
45 | 45 |
|
46 | 46 | gpio_prt0: gpio@40410000 { |
47 | 47 | compatible = "infineon,cat1-gpio"; |
48 | 48 | reg = <0x40410000 0x80>; |
49 | | - interrupts = <0 6>; |
| 49 | + interrupts = <0 4>; |
50 | 50 | gpio-controller; |
51 | 51 | ngpios = <6>; |
52 | 52 | status = "disabled"; |
|
55 | 55 | gpio_prt1: gpio@40410080 { |
56 | 56 | compatible = "infineon,cat1-gpio"; |
57 | 57 | reg = <0x40410080 0x80>; |
58 | | - interrupts = <1 6>; |
| 58 | + interrupts = <1 4>; |
59 | 59 | gpio-controller; |
60 | 60 | ngpios = <7>; |
61 | 61 | status = "disabled"; |
|
64 | 64 | gpio_prt2: gpio@40410100 { |
65 | 65 | compatible = "infineon,cat1-gpio"; |
66 | 66 | reg = <0x40410100 0x80>; |
67 | | - interrupts = <2 6>; |
| 67 | + interrupts = <2 4>; |
68 | 68 | gpio-controller; |
69 | 69 | ngpios = <6>; |
70 | 70 | status = "disabled"; |
|
73 | 73 | gpio_prt3: gpio@40410180 { |
74 | 74 | compatible = "infineon,cat1-gpio"; |
75 | 75 | reg = <0x40410180 0x80>; |
76 | | - interrupts = <3 6>; |
| 76 | + interrupts = <3 4>; |
77 | 77 | gpio-controller; |
78 | 78 | ngpios = <8>; |
79 | 79 | status = "disabled"; |
|
82 | 82 | gpio_prt4: gpio@40410200 { |
83 | 83 | compatible = "infineon,cat1-gpio"; |
84 | 84 | reg = <0x40410200 0x80>; |
85 | | - interrupts = <4 6>; |
| 85 | + interrupts = <4 4>; |
86 | 86 | gpio-controller; |
87 | 87 | ngpios = <2>; |
88 | 88 | status = "disabled"; |
|
91 | 91 | gpio_prt5: gpio@40410280 { |
92 | 92 | compatible = "infineon,cat1-gpio"; |
93 | 93 | reg = <0x40410280 0x80>; |
94 | | - interrupts = <5 6>; |
| 94 | + interrupts = <5 4>; |
95 | 95 | gpio-controller; |
96 | 96 | ngpios = <3>; |
97 | 97 | status = "disabled"; |
|
108 | 108 | scb0: scb@40590000 { |
109 | 109 | compatible = "infineon,cat1-scb"; |
110 | 110 | reg = <0x40590000 0xfd0>; |
111 | | - interrupts = <8 6>; |
| 111 | + interrupts = <8 4>; |
112 | 112 | status = "disabled"; |
113 | 113 | }; |
114 | 114 | scb1: scb@405a0000 { |
115 | 115 | compatible = "infineon,cat1-scb"; |
116 | 116 | reg = <0x405a0000 0xfd0>; |
117 | | - interrupts = <17 6>; |
| 117 | + interrupts = <17 4>; |
118 | 118 | status = "disabled"; |
119 | 119 | }; |
120 | 120 | scb2: scb@405b0000 { |
121 | 121 | compatible = "infineon,cat1-scb"; |
122 | 122 | reg = <0x405b0000 0xfd0>; |
123 | | - interrupts = <18 6>; |
| 123 | + interrupts = <18 4>; |
124 | 124 | status = "disabled"; |
125 | 125 | }; |
126 | 126 |
|
127 | 127 | watchdog0: watchdog@4020c000 { |
128 | 128 | compatible = "infineon,cat1-watchdog"; |
129 | 129 | reg = <0x4020c000 0x10>; |
130 | | - interrupts = <15 6>; |
| 130 | + interrupts = <15 4>; |
131 | 131 | status = "disabled"; |
132 | 132 | }; |
133 | 133 |
|
134 | 134 | mcwdt0: mcwdt@4020d000 { |
135 | 135 | compatible = "infineon,cat1-lp-timer"; |
136 | 136 | reg = <0x4020d000 0x40>; |
137 | | - interrupts = <9 6>; |
| 137 | + interrupts = <9 4>; |
138 | 138 | status = "disabled"; |
139 | 139 | }; |
140 | 140 |
|
141 | 141 | counter0_0: counter@404a0000 { |
142 | 142 | compatible = "infineon,cat1-counter"; |
143 | 143 | reg = <0x404a0000 0x80>; |
144 | | - interrupts = <42 6>; |
| 144 | + interrupts = <42 4>; |
145 | 145 | resolution = <32>; |
146 | 146 | status = "disabled"; |
147 | 147 | }; |
148 | 148 | counter0_1: counter@404a0080 { |
149 | 149 | compatible = "infineon,cat1-counter"; |
150 | 150 | reg = <0x404a0080 0x80>; |
151 | | - interrupts = <43 6>; |
| 151 | + interrupts = <43 4>; |
152 | 152 | resolution = <32>; |
153 | 153 | status = "disabled"; |
154 | 154 | }; |
155 | 155 | counter1_0: counter@404a8000 { |
156 | 156 | compatible = "infineon,cat1-counter"; |
157 | 157 | reg = <0x404a8000 0x80>; |
158 | | - interrupts = <44 6>; |
| 158 | + interrupts = <44 4>; |
159 | 159 | resolution = <16>; |
160 | 160 | status = "disabled"; |
161 | 161 | }; |
162 | 162 | counter1_1: counter@404a8080 { |
163 | 163 | compatible = "infineon,cat1-counter"; |
164 | 164 | reg = <0x404a8080 0x80>; |
165 | | - interrupts = <45 6>; |
| 165 | + interrupts = <45 4>; |
166 | 166 | resolution = <16>; |
167 | 167 | status = "disabled"; |
168 | 168 | }; |
169 | 169 | counter1_2: counter@404a8100 { |
170 | 170 | compatible = "infineon,cat1-counter"; |
171 | 171 | reg = <0x404a8100 0x80>; |
172 | | - interrupts = <46 6>; |
| 172 | + interrupts = <46 4>; |
173 | 173 | resolution = <16>; |
174 | 174 | status = "disabled"; |
175 | 175 | }; |
176 | 176 | counter1_3: counter@404a8180 { |
177 | 177 | compatible = "infineon,cat1-counter"; |
178 | 178 | reg = <0x404a8180 0x80>; |
179 | | - interrupts = <47 6>; |
| 179 | + interrupts = <47 4>; |
180 | 180 | resolution = <16>; |
181 | 181 | status = "disabled"; |
182 | 182 | }; |
183 | 183 | counter1_4: counter@404a8200 { |
184 | 184 | compatible = "infineon,cat1-counter"; |
185 | 185 | reg = <0x404a8200 0x80>; |
186 | | - interrupts = <48 6>; |
| 186 | + interrupts = <48 4>; |
187 | 187 | resolution = <16>; |
188 | 188 | status = "disabled"; |
189 | 189 | }; |
190 | 190 | counter1_5: counter@404a8280 { |
191 | 191 | compatible = "infineon,cat1-counter"; |
192 | 192 | reg = <0x404a8280 0x80>; |
193 | | - interrupts = <49 6>; |
| 193 | + interrupts = <49 4>; |
194 | 194 | resolution = <16>; |
195 | 195 | status = "disabled"; |
196 | 196 | }; |
197 | 197 | counter1_6: counter@404a8300 { |
198 | 198 | compatible = "infineon,cat1-counter"; |
199 | 199 | reg = <0x404a8300 0x80>; |
200 | | - interrupts = <50 6>; |
| 200 | + interrupts = <50 4>; |
201 | 201 | resolution = <16>; |
202 | 202 | status = "disabled"; |
203 | 203 | }; |
204 | 204 |
|
205 | 205 | pwm0_0: pwm@404a0000 { |
206 | 206 | compatible = "infineon,cat1-pwm"; |
207 | 207 | reg = <0x404a0000 0x80>; |
208 | | - interrupts = <42 6>; |
| 208 | + interrupts = <42 4>; |
209 | 209 | resolution = <32>; |
210 | 210 | status = "disabled"; |
211 | 211 | }; |
212 | 212 | pwm0_1: pwm@404a0080 { |
213 | 213 | compatible = "infineon,cat1-pwm"; |
214 | 214 | reg = <0x404a0080 0x80>; |
215 | | - interrupts = <43 6>; |
| 215 | + interrupts = <43 4>; |
216 | 216 | resolution = <32>; |
217 | 217 | status = "disabled"; |
218 | 218 | }; |
219 | 219 | pwm1_0: pwm@404a8000 { |
220 | 220 | compatible = "infineon,cat1-pwm"; |
221 | 221 | reg = <0x404a8000 0x80>; |
222 | | - interrupts = <44 6>; |
| 222 | + interrupts = <44 4>; |
223 | 223 | resolution = <16>; |
224 | 224 | status = "disabled"; |
225 | 225 | }; |
226 | 226 | pwm1_1: pwm@404a8080 { |
227 | 227 | compatible = "infineon,cat1-pwm"; |
228 | 228 | reg = <0x404a8080 0x80>; |
229 | | - interrupts = <45 6>; |
| 229 | + interrupts = <45 4>; |
230 | 230 | resolution = <16>; |
231 | 231 | status = "disabled"; |
232 | 232 | }; |
233 | 233 | pwm1_2: pwm@404a8100 { |
234 | 234 | compatible = "infineon,cat1-pwm"; |
235 | 235 | reg = <0x404a8100 0x80>; |
236 | | - interrupts = <46 6>; |
| 236 | + interrupts = <46 4>; |
237 | 237 | resolution = <16>; |
238 | 238 | status = "disabled"; |
239 | 239 | }; |
240 | 240 | pwm1_3: pwm@404a8180 { |
241 | 241 | compatible = "infineon,cat1-pwm"; |
242 | 242 | reg = <0x404a8180 0x80>; |
243 | | - interrupts = <47 6>; |
| 243 | + interrupts = <47 4>; |
244 | 244 | resolution = <16>; |
245 | 245 | status = "disabled"; |
246 | 246 | }; |
247 | 247 | pwm1_4: pwm@404a8200 { |
248 | 248 | compatible = "infineon,cat1-pwm"; |
249 | 249 | reg = <0x404a8200 0x80>; |
250 | | - interrupts = <48 6>; |
| 250 | + interrupts = <48 4>; |
251 | 251 | resolution = <16>; |
252 | 252 | status = "disabled"; |
253 | 253 | }; |
254 | 254 | pwm1_5: pwm@404a8280 { |
255 | 255 | compatible = "infineon,cat1-pwm"; |
256 | 256 | reg = <0x404a8280 0x80>; |
257 | | - interrupts = <49 6>; |
| 257 | + interrupts = <49 4>; |
258 | 258 | resolution = <16>; |
259 | 259 | status = "disabled"; |
260 | 260 | }; |
261 | 261 | pwm1_6: pwm@404a8300 { |
262 | 262 | compatible = "infineon,cat1-pwm"; |
263 | 263 | reg = <0x404a8300 0x80>; |
264 | | - interrupts = <50 6>; |
| 264 | + interrupts = <50 4>; |
265 | 265 | resolution = <16>; |
266 | 266 | status = "disabled"; |
267 | 267 | }; |
|
271 | 271 | compatible = "infineon,cat1-dma"; |
272 | 272 | reg = <0x40180000 0x10000>; |
273 | 273 | dma-channels = <16>; |
274 | | - interrupts = <19 6>, /* CH0 */ |
275 | | - <20 6>, /* CH1 */ |
276 | | - <21 6>, /* CH2 */ |
277 | | - <22 6>, /* CH3 */ |
278 | | - <23 6>, /* CH4 */ |
279 | | - <24 6>, /* CH5 */ |
280 | | - <25 6>, /* CH6 */ |
281 | | - <26 6>, /* CH7 */ |
282 | | - <27 6>, /* CH8 */ |
283 | | - <28 6>, /* CH9 */ |
284 | | - <29 6>, /* CH10 */ |
285 | | - <30 6>, /* CH11 */ |
286 | | - <31 6>, /* CH12 */ |
287 | | - <32 6>, /* CH13 */ |
288 | | - <33 6>, /* CH14 */ |
289 | | - <34 6>; /* CH15 */ |
| 274 | + interrupts = <19 4>, /* CH0 */ |
| 275 | + <20 4>, /* CH1 */ |
| 276 | + <21 4>, /* CH2 */ |
| 277 | + <22 4>, /* CH3 */ |
| 278 | + <23 4>, /* CH4 */ |
| 279 | + <24 4>, /* CH5 */ |
| 280 | + <25 4>, /* CH6 */ |
| 281 | + <26 4>, /* CH7 */ |
| 282 | + <27 4>, /* CH8 */ |
| 283 | + <28 4>, /* CH9 */ |
| 284 | + <29 4>, /* CH10 */ |
| 285 | + <30 4>, /* CH11 */ |
| 286 | + <31 4>, /* CH12 */ |
| 287 | + <32 4>, /* CH13 */ |
| 288 | + <33 4>, /* CH14 */ |
| 289 | + <34 4>; /* CH15 */ |
290 | 290 | status = "disabled"; |
291 | 291 | }; |
292 | 292 | bluetooth: btss@42000000 { |
293 | 293 | compatible = "infineon,cyw208xx-hci"; |
294 | 294 | reg = <0x42000000 0x6186A0>; |
295 | | - interrupts = <16 6>; |
| 295 | + interrupts = <16 4>; |
296 | 296 | status = "disabled"; |
297 | 297 | }; |
298 | 298 |
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