drivers: wdt_wwdg_stm32: freeze watchdog in debug mode for mp2x SoCs

Like the H7x series, the MP2x series has a WWDG1 peripheral in the APB3
bus. The MP2 has the same LL function to freeze the watchdog in debug
mode.

Signed-off-by: Luc BEAUFILS <[email protected]>

Author: lucbeaufils

drivers/watchdog/wdt_wwdg_stm32.c

@@ -173,7 +173,8 @@ static int wwdg_stm32_setup(const struct device *dev, uint8_t options)
 #elif defined(CONFIG_SOC_SERIES_STM32C0X) || defined(CONFIG_SOC_SERIES_STM32G0X)
 		LL_APB1_GRP1_EnableClock(LL_APB1_GRP1_PERIPH_DBGMCU);
 #endif
-#if defined(CONFIG_SOC_SERIES_STM32H7X)
+
+#if defined(CONFIG_SOC_SERIES_STM32H7X) || defined(CONFIG_SOC_SERIES_STM32MP2X)
 		LL_DBGMCU_APB3_GRP1_FreezePeriph(LL_DBGMCU_APB3_GRP1_WWDG1_STOP);
 #elif defined(CONFIG_SOC_SERIES_STM32MP1X)
 		LL_DBGMCU_APB1_GRP1_FreezePeriph(LL_DBGMCU_APB1_GRP1_WWDG1_STOP);