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boards: silabs: slstk3701a: Enable LPM013M126A Display
Enable the LPM013M126A display node under USART1 in the slstk3701a DTS. Add pre_dt_board.cmake to suppress SPI bus bridge warnings, and update the pinctrl configuration to properly configure the display control pins. Signed-off-by: Elgin Perumbilly <[email protected]>
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# Copyright (c) 2025 Silicon Signals Pvt. Ltd.
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# SPDX-License-Identifier: Apache-2.0
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# SPI functionality is provided via a USART peripheral; the node is named
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# usart@..., not spi@... To suppress the 'spi_bus_reg: Failed prerequisite
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# "spi_bus_bridge"' warning, the -Wno-spi_bus_bridge flag is applied.
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list(APPEND EXTRA_DTC_FLAGS "-Wno-spi_bus_bridge")

boards/silabs/starter_kits/slstk3701a/slstk3701a-pinctrl.dtsi

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<GECKO_LOC(UART_RX, 4)>;
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};
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};
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usart1_default: usart1_default {
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group1 {
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psels = <GECKO_PSEL(SPIM_SCK, C, 15)>,
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<GECKO_PSEL(SPIM_MISO, A, 0)>,
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<GECKO_PSEL(SPIM_MOSI, A, 14)>,
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<GECKO_LOC(SPI_SCK, 3)>,
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<GECKO_LOC(SPI_MISO, 0)>,
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<GECKO_LOC(SPI_MOSI, 6)>;
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};
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};
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};

boards/silabs/starter_kits/slstk3701a/slstk3701a.dts

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zephyr,flash = &flash0;
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zephyr,shell-uart = &usart4;
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zephyr,sram = &sram0;
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zephyr,display = &lpm013m126;
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};
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/* These aliases are provided for compatibility with samples */
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};
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};
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&usart1 {
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compatible = "silabs,usart-spi";
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#address-cells = <1>;
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#size-cells = <0>;
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cs-gpios = <&gpioc 14 GPIO_ACTIVE_HIGH>;
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pinctrl-0 = <&usart1_default>;
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pinctrl-names = "default";
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status = "okay";
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lpm013m126: lpm013m126@0 {
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compatible = "jdi,lpm013m126";
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reg = <0>;
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height = <176>;
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width = <176>;
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spi-max-frequency = <2000000>;
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disp-gpios = <&gpioa 9 GPIO_ACTIVE_HIGH>;
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extcomin-gpios = <&gpioa 11 GPIO_ACTIVE_HIGH>;
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extcomin-frequency = <60>;
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};
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};
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&usart0 {
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current-speed = <115200>;
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pinctrl-0 = <&usart0_default>;

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