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xenvm: switch to Xen PV console instead of PL011 SBSA
This commit removes usage of Xen emulated PL011 SBSA UART in favor of Xen PV console minimal implementation. Now boot log and application output can be directly taken from hypervisor domain console, instead of virtual UART. Also Xen VM doc was updated according to these changes. Signed-off-by: Dmytro Firsov <[email protected]>
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boards/arm64/xenvm/doc/index.rst

Lines changed: 16 additions & 18 deletions
Original file line numberDiff line numberDiff line change
@@ -20,8 +20,6 @@ It provides minimal set of devices:
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* ARM Generic timer
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* GICv2
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* SBSA (subset of PL011) UART controller
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Hardware
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********
@@ -35,8 +33,6 @@ The following hardware features are supported:
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+==============+=============+======================+
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| GIC | virtualized | interrupt controller |
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+--------------+-------------+----------------------+
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| SBSA UART | emulated | serial port |
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+--------------+-------------+----------------------+
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| ARM TIMER | virtualized | system clock |
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+--------------+-------------+----------------------+
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@@ -57,13 +53,6 @@ boot log:
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(XEN) [ 0.147541] Generic Timer IRQ: phys=30 hyp=26 virt=27 Freq: 8320 KHz
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Serial Port
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-----------
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This board configuration uses a single serial communication channel using SBSA
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UART. This is a minimal UART implementation provided by Xen. Xen PV Console is
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not supported at this moment.
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Interrupt Controller
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--------------------
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@@ -88,13 +77,17 @@ configuration would not boot on your hardware. In this case you need to update
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configuration by altering device tree and Kconfig options. This will be covered
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in detail in next section.
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No Xen-specific features are supported at the moment. This includes:
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Most of Xen-specific features are not supported at the moment. This includes:
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* Xen Enlighten memory page
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* Xen Enlighten memory page (under development)
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* XenBus
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* Xen event channels
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* Xen event channels (under development)
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* Xen grant tables
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* Xen PV drivers (including PV console)
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* Xen PV drivers
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Now only following features are supported:
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* Xen PV console (UART-like driver with poll API, IRQ driven is under development)
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* Xen early console_io interface (mainly for debug purposes)
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Building and Running
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********************
@@ -118,7 +111,6 @@ create guest configuration file :code:`zephyr.conf`. There is example:
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memory=16
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gic_version="v2"
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on_crash="preserve"
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vuart="sbsa_uart"
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You need to upload both :code:`zephyr.bin` and :code:`zephyr.conf` to your Dom0
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and then you can run Zephyr by issuing
@@ -127,11 +119,17 @@ and then you can run Zephyr by issuing
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$ xl create zephyr.conf
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Next you need to attach to SBSA virtual console:
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Next you need to attach to PV console:
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.. code-block::
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$ xl console zephyr
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Also this can be performed via single command:
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.. code-block::
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$ xl console -t vuart zephyr
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$ xl create -c zephyr.conf
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You will see Zephyr output:
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boards/arm64/xenvm/xenvm.dts

Lines changed: 4 additions & 9 deletions
Original file line numberDiff line numberDiff line change
@@ -25,9 +25,8 @@
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#size-cells = <0x02>;
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chosen {
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zephyr,console = &sbsa;
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zephyr,shell-uart = &sbsa;
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zephyr,sram = &ram;
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zephyr,console = &xen_hvc;
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};
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cpus {
@@ -78,12 +77,8 @@
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interrupt-parent = <&gic>;
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};
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sbsa: sbsa-pl011@22000000 {
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compatible = "arm,sbsa-uart";
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reg = <0x00 0x22000000 0x00 0x1000>;
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interrupts = <GIC_SPI 0x00 IRQ_TYPE_LEVEL IRQ_DEFAULT_PRIORITY>;
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interrupt-parent = <&gic>;
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current-speed = <0x1c200>;
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label = "UART";
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xen_hvc: hvc {
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compatible = "xen,uart_hvc";
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status = "okay";
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};
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};

boards/arm64/xenvm/xenvm_defconfig

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Original file line numberDiff line numberDiff line change
@@ -14,7 +14,9 @@ CONFIG_MAX_XLAT_TABLES=10
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CONFIG_CONSOLE=y
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CONFIG_UART_CONSOLE=y
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# Enable serial port
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CONFIG_UART_PL011=y
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CONFIG_UART_PL011_SBSA=y
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CONFIG_UART_INTERRUPT_DRIVEN=n
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# Enable PV hypervisor console
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CONFIG_UART_XEN_HVC=y
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# Enable logging subsys
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CONFIG_LOG=y
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CONFIG_LOG_MODE_MINIMAL=y

soc/arm64/xenvm/mmu_regions.c

Lines changed: 0 additions & 5 deletions
Original file line numberDiff line numberDiff line change
@@ -18,11 +18,6 @@ static const struct arm_mmu_region mmu_regions[] = {
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DT_REG_ADDR_BY_IDX(DT_INST(0, arm_gic), 1),
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DT_REG_SIZE_BY_IDX(DT_INST(0, arm_gic), 1),
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MT_DEVICE_nGnRnE | MT_P_RW_U_RW | MT_NS),
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MMU_REGION_FLAT_ENTRY("UART",
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DT_REG_ADDR(DT_INST(0, arm_sbsa_uart)),
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DT_REG_SIZE(DT_INST(0, arm_sbsa_uart)),
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MT_DEVICE_nGnRnE | MT_P_RW_U_RW | MT_NS),
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};
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const struct arm_mmu_config mmu_config = {

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