riscv: pmp: Add macro to convert DT memory attributes to PMP permissions

Introduce the DT_MEM_RISCV_TO_PMP_PERM macro to translate Device Tree
RISC-V memory attributes (DT_MEM_RISCV_TYPE_IO_R, DT_MEM_RISCV_TYPE_IO_W,
DT_MEM_RISCV_TYPE_IO_X) into their corresponding RISC-V PMP permission
bits (PMP_R, PMP_W, PMP_X).

This allows for a clear and standardized way to define PMP regions
based on Device Tree properties.

Added a test suite for RISC-V PMP utilities, including a test case
to verify the correctness of the DT_MEM_RISCV_TO_PMP_PERM macro
across various attribute combinations.

Signed-off-by: Firas Sammoura <[email protected]>

Author: fsammoura1980

arch/riscv/include/pmp.h

@@ -7,6 +7,13 @@
 #ifndef PMP_H_
 #define PMP_H_
 
+#include <zephyr/dt-bindings/memory-attr/memory-attr-riscv.h>
+
+#define DT_MEM_RISCV_TO_PMP_PERM(dt_attr) (		\
+	(((dt_attr) & DT_MEM_RISCV_TYPE_IO_R) ? PMP_R : 0) |	\
+	(((dt_attr) & DT_MEM_RISCV_TYPE_IO_W) ? PMP_W : 0) |	\
+	(((dt_attr) & DT_MEM_RISCV_TYPE_IO_X) ? PMP_X : 0))
+
 void z_riscv_pmp_init(void);
 void z_riscv_pmp_stackguard_prepare(struct k_thread *thread);
 void z_riscv_pmp_stackguard_enable(struct k_thread *thread);

tests/arch/riscv/pmp/general/CMakeLists.txt

@@ -0,0 +1,13 @@
+# SPDX-License-Identifier: Apache-2.0
+
+cmake_minimum_required(VERSION 3.20.0)
+find_package(Zephyr REQUIRED HINTS $ENV{ZEPHYR_BASE})
+project(riscv_pmp)
+
+FILE(GLOB app_sources src/*.c)
+target_sources(app PRIVATE ${app_sources})
+
+target_include_directories(app PRIVATE
+  ${ZEPHYR_BASE}/kernel/include
+  ${ZEPHYR_BASE}/arch/${ARCH}/include
+  )

tests/arch/riscv/pmp/general/prj.conf

@@ -0,0 +1,3 @@
+CONFIG_ZTEST=y
+CONFIG_MULTITHREADING=y
+CONFIG_RISCV_PMP=y

tests/arch/riscv/pmp/general/src/main.c

@@ -0,0 +1,36 @@
+/*
+ * Copyright (c) 2025 Alphabet.
+ * SPDX-License-Identifier: Apache-2.0
+ */
+
+#include <kernel_internal.h>
+#include <zephyr/tc_util.h>
+#include <zephyr/ztest.h>
+
+ZTEST(riscv_pmp_general, test_dt_pmp_perm_conversion)
+{
+	uint8_t result;
+
+	result = DT_MEM_RISCV_TO_PMP_PERM(0);
+	zassert_equal(result, 0, "Expected 0, got 0x%x", result);
+
+	result = DT_MEM_RISCV_TO_PMP_PERM(DT_MEM_RISCV_TYPE_IO_R);
+	zassert_equal(result, PMP_R, "Expected PMP_R (0x%x), got 0x%x", PMP_R, result);
+
+	result = DT_MEM_RISCV_TO_PMP_PERM(DT_MEM_RISCV_TYPE_IO_W);
+	zassert_equal(result, PMP_W, "Expected PMP_W (0x%x), got 0x%x", PMP_W, result);
+
+	result = DT_MEM_RISCV_TO_PMP_PERM(DT_MEM_RISCV_TYPE_IO_X);
+	zassert_equal(result, PMP_X, "Expected PMP_X (0x%x), got 0x%x", PMP_X, result);
+
+	result = DT_MEM_RISCV_TO_PMP_PERM(DT_MEM_RISCV_TYPE_IO_R | DT_MEM_RISCV_TYPE_IO_W);
+	zassert_equal(result, PMP_R | PMP_W, "Expected R|W (0x%x), got 0x%x", PMP_R | PMP_W,
+		      result);
+
+	result = DT_MEM_RISCV_TO_PMP_PERM(DT_MEM_RISCV_TYPE_IO_R | DT_MEM_RISCV_TYPE_IO_W |
+					  DT_MEM_RISCV_TYPE_IO_X);
+	zassert_equal(result, PMP_R | PMP_W | PMP_X, "Expected R|W|X (0x%x), got 0x%x",
+		      PMP_R | PMP_W | PMP_X, result);
+}
+
+ZTEST_SUITE(riscv_pmp_general, NULL, NULL, NULL, NULL, NULL);

tests/arch/riscv/pmp/general/testcase.yaml

@@ -0,0 +1,11 @@
+common:
+  platform_allow:
+    - qemu_riscv32
+    - qemu_riscv32e
+    - qemu_riscv64
+  filter: CONFIG_RISCV_PMP
+  ignore_faults: true
+
+tests:
+  arch.riscv.pmp.general:
+    tags: test_framework