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sylvioalveskartben
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drivers: entropy: espressif: enable TRNG in driver, not clock init
Move the TRNG peripheral enable from the clock/SoC init path to the Espressif entropy driver init. Signed-off-by: Sylvio Alves <[email protected]>
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2 files changed

+6
-19
lines changed

2 files changed

+6
-19
lines changed

drivers/clock_control/clock_control_esp32.c

Lines changed: 0 additions & 3 deletions
Original file line numberDiff line numberDiff line change
@@ -514,9 +514,6 @@ static void esp32_clock_perip_init(void)
514514
DPORT_SET_PERI_REG_MASK(DPORT_BT_LPCK_DIV_FRAC_REG, DPORT_LPCLK_SEL_RTC_SLOW);
515515
#endif
516516

517-
/* Enable RNG clock. */
518-
periph_module_enable(PERIPH_RNG_MODULE);
519-
520517
#if defined(CONFIG_SOC_SERIES_ESP32C2) || \
521518
defined(CONFIG_SOC_SERIES_ESP32C3) || \
522519
defined(CONFIG_SOC_SERIES_ESP32S3)

drivers/entropy/entropy_esp32.c

Lines changed: 6 additions & 16 deletions
Original file line numberDiff line numberDiff line change
@@ -14,9 +14,7 @@
1414
#include <esp_cpu.h>
1515
#include <zephyr/logging/log.h>
1616
#include <zephyr/drivers/entropy.h>
17-
#if defined(SOC_RNG_CLOCK_IS_INDEPENDENT)
1817
#include <zephyr/drivers/clock_control.h>
19-
#endif
2018

2119
LOG_MODULE_REGISTER(entropy, CONFIG_ENTROPY_LOG_LEVEL);
2220

@@ -36,6 +34,9 @@ LOG_MODULE_REGISTER(entropy, CONFIG_ENTROPY_LOG_LEVEL);
3634
* plus additional overhead for the calculation, making it slower.
3735
*/
3836
#define APB_CYCLE_WAIT_NUM (160 * 16)
37+
#elif defined CONFIG_SOC_SERIES_ESP32H2
38+
/* Same reasoning as for ESP32C6, but the CPU frequency on ESP32H2 is 96MHz instead of 160 MHz */
39+
#define APB_CYCLE_WAIT_NUM (96 * 16)
3940
#else
4041
#define APB_CYCLE_WAIT_NUM (16)
4142
#endif
@@ -95,28 +96,17 @@ static int entropy_esp32_get_entropy(const struct device *dev, uint8_t *buf,
9596

9697
static int entropy_esp32_init(const struct device *dev)
9798
{
98-
int ret = 0;
99-
100-
#if defined(SOC_RNG_CLOCK_IS_INDEPENDENT)
101-
const struct device *clock_dev =
102-
DEVICE_DT_GET(DT_CLOCKS_CTLR(DT_NODELABEL(trng0)));
99+
const struct device *clock_dev = DEVICE_DT_GET(DT_CLOCKS_CTLR(DT_NODELABEL(trng0)));
103100
clock_control_subsys_t clock_subsys =
104101
(clock_control_subsys_t)DT_CLOCKS_CELL(DT_NODELABEL(trng0), offset);
105102

106103
if (!device_is_ready(clock_dev)) {
107104
return -ENODEV;
108105
}
109106

110-
ret = clock_control_on(clock_dev, clock_subsys);
107+
clock_control_on(clock_dev, clock_subsys);
111108

112-
if (ret != 0) {
113-
LOG_ERR("Error enabling TRNG clock");
114-
}
115-
#else
116-
/* clock initialization handled by clock manager */
117-
#endif
118-
119-
return ret;
109+
return 0;
120110
}
121111

122112
static DEVICE_API(entropy, entropy_esp32_api_funcs) = {

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