soc: atmel_sam0: Add SAME54

This adds supoprt for the Atmel SAME54 SoC.

The SAME5x/SAMD5x is a line of Cortex-M4F MCUs that share peripherals
with the sam0 Cortex-M0+ and saml1x Cortex-M23 parts.

Signed-off-by: Benjamin Valentin <[email protected]>

Author: benpicco

CODEOWNERS

@@ -185,6 +185,7 @@
 /drivers/wifi/eswifi/                     @loicpoulain
 /dts/arc/                                 @vonhust @ruuddw @iriszzw
 /dts/arm/atmel/samr21.dtsi                @benpicco
+/dts/arm/atmel/sam*5*.dtsi                @benpicco
 /dts/arm/st/                              @erwango
 /dts/arm/ti/cc13?2*                       @bwitherspoon
 /dts/arm/ti/cc26?2*                       @bwitherspoon

dts/arm/atmel/samd5x.dtsi

@@ -0,0 +1,323 @@
+/*
+ * Copyright (c) 2019 ML!PA Consulting GmbH
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ */
+
+#include <arm/armv7-m.dtsi>
+#include <dt-bindings/gpio/gpio.h>
+#include <dt-bindings/i2c/i2c.h>
+
+/ {
+	cpus {
+		#address-cells = <1>;
+		#size-cells = <0>;
+
+		cpu@0 {
+			device_type = "cpu";
+			compatible = "arm,cortex-m4";
+			reg = <0>;
+		};
+	};
+
+	aliases {
+		adc-0 = &adc0;
+		adc-1 = &adc1;
+
+		pinmux-a = &pinmux_a;
+		pinmux-b = &pinmux_b;
+		pinmux-c = &pinmux_c;
+		pinmux-d = &pinmux_d;
+
+		port-a = &porta;
+		port-b = &portb;
+		port-c = &portc;
+		port-d = &portd;
+
+		sercom-0 = &sercom0;
+		sercom-1 = &sercom1;
+		sercom-2 = &sercom2;
+		sercom-3 = &sercom3;
+		sercom-4 = &sercom4;
+		sercom-5 = &sercom5;
+		sercom-6 = &sercom6;
+		sercom-7 = &sercom7;
+
+		tc-0 = &tc0;
+		tc-2 = &tc2;
+		tc-4 = &tc4;
+		tc-6 = &tc6;
+	};
+
+	soc {
+		flash0: flash@0 {
+			compatible = "soc-nv-flash";
+			label = "FLASH_0";
+			write-block-size = <512>;
+		};
+
+		sram0: memory@20000000 {
+			compatible = "mmio-sram";
+			reg = <0x20000000 0x40000>;
+		};
+
+		backup0: memory@47000000 {
+			compatible = "mmio-sram";
+			reg = <0x47000000 0x2000>;
+		};
+
+		id: device_id@8061fc {
+			compatible = "atmel,sam0-id";
+			reg =	<0x008061FC 0x4>,
+				<0x00806010 0x4>,
+				<0x00806014 0x4>,
+				<0x00806018 0x4>;
+		};
+
+		nvmctrl: nvmctrl@41004000  {
+			compatible = "atmel,sam0-nvmctrl";
+			label = "FLASH_CTRL";
+			reg = <0x41004000 0x22>;
+			interrupts = <29 0>, <30 0>;
+			lock-regions = <32>;
+
+			#address-cells = <1>;
+			#size-cells = <1>;
+		};
+
+		dma: dmac@4100A000 {
+			compatible = "atmel,sam0-dmac";
+			reg = <0x4100A000 0x50>;
+			interrupts = <31 0>, <32 0>, <33 0>, <34 0>, <35 0>;
+			label = "DMA_0";
+		};
+
+		eic: eic@40002800 {
+			compatible = "atmel,sam0-eic";
+			reg = <0x40002800 0x38>;
+			interrupts = <12 0>, <13 0>, <14 0>, <15 0>,
+				     <16 0>, <17 0>, <18 0>, <19 0>,
+				     <20 0>, <21 0>, <22 0>, <23 0>,
+				     <24 0>, <25 0>, <26 0>, <27 0>;
+			label = "EIC";
+		};
+
+		pinmux_a: pinmux@41008000 {
+			compatible = "atmel,sam0-pinmux";
+			reg = <0x41008000 0x80>;
+			label = "PINMUX_A";
+		};
+
+		pinmux_b: pinmux@41008080 {
+			compatible = "atmel,sam0-pinmux";
+			reg = <0x41008080 0x80>;
+			label = "PINMUX_B";
+		};
+
+		pinmux_c: pinmux@41008100 {
+			compatible = "atmel,sam0-pinmux";
+			reg = <0x41008100 0x80>;
+			label = "PINMUX_C";
+		};
+
+		pinmux_d: pinmux@41008180 {
+			compatible = "atmel,sam0-pinmux";
+			reg = <0x41008180 0x80>;
+			label = "PINMUX_D";
+		};
+
+		wdog: watchdog@40002000 {
+			compatible = "atmel,sam0-watchdog";
+			reg = <0x40002000 13>;
+			interrupts = <10 0>;
+			label = "WATCHDOG_0";
+		};
+
+		sercom0: sercom@40003000 {
+			compatible = "atmel,sam0-sercom";
+			reg = <0x40003000 0x40>;
+			interrupts = <46 0>, <47 0>, <48 0>, <49 0>;
+			status = "disabled";
+			label = "SERCOM0";
+		};
+
+		sercom1: sercom@40003400 {
+			compatible = "atmel,sam0-sercom";
+			reg = <0x40003400 0x40>;
+			interrupts = <50 0>, <51 0>, <52 0>, <53 0>;
+			status = "disabled";
+			label = "SERCOM1";
+		};
+
+		sercom2: sercom@41012000 {
+			compatible = "atmel,sam0-sercom";
+			reg = <0x41012000 0x40>;
+			interrupts = <54 0>, <55 0>, <56 0>, <57 0>;
+			status = "disabled";
+			label = "SERCOM2";
+		};
+
+		sercom3: sercom@41014000 {
+			compatible = "atmel,sam0-sercom";
+			reg = <0x41014000 0x40>;
+			interrupts = <58 0>, <59 0>, <60 0>, <61 0>;
+			status = "disabled";
+			label = "SERCOM3";
+		};
+
+		sercom4: sercom@43000000 {
+			compatible = "atmel,sam0-sercom";
+			reg = <0x43000000 0x40>;
+			interrupts = <62 0>, <63 0>, <64 0>, <65 0>;
+			status = "disabled";
+			label = "SERCOM4";
+		};
+
+		sercom5: sercom@43000400 {
+			compatible = "atmel,sam0-sercom";
+			reg = <0x43000400 0x40>;
+			interrupts = <66 0>, <67 0>, <68 0>, <69 0>;
+			status = "disabled";
+			label = "SERCOM5";
+		};
+
+		sercom6: sercom@43000800 {
+			compatible = "atmel,sam0-sercom";
+			reg = <0x43000800 0x40>;
+			interrupts = <70 0>, <71 0>, <72 0>, <73 0>;
+			status = "disabled";
+			label = "SERCOM6";
+		};
+
+		sercom7: sercom@43000C00 {
+			compatible = "atmel,sam0-sercom";
+			reg = <0x43000C00 0x40>;
+			interrupts = <74 0>, <75 0>, <76 0>, <77 0>;
+			status = "disabled";
+			label = "SERCOM7";
+		};
+
+		porta: gpio@41008000 {
+			compatible = "atmel,sam0-gpio";
+			reg = <0x41008000 0x80>;
+			label = "PORTA";
+			gpio-controller;
+			#gpio-cells = <2>;
+		};
+
+		portb: gpio@41008080 {
+			compatible = "atmel,sam0-gpio";
+			reg = <0x41008080 0x80>;
+			label = "PORTB";
+			gpio-controller;
+			#gpio-cells = <2>;
+		};
+
+		portc: gpio@41008100 {
+			compatible = "atmel,sam0-gpio";
+			reg = <0x41008100 0x80>;
+			label = "PORTC";
+			gpio-controller;
+			#gpio-cells = <2>;
+		};
+
+		portd: gpio@41008180 {
+			compatible = "atmel,sam0-gpio";
+			reg = <0x41008180 0x80>;
+			label = "PORTD";
+			gpio-controller;
+			#gpio-cells = <2>;
+		};
+
+		usb0: usb@41000000 {
+			compatible = "atmel,sam0-usb";
+			status = "disabled";
+			reg = <0x41000000 0x1000>;
+			interrupts = <80 0>, <81 0>, <82 0>, <83 0>;
+			num-bidir-endpoints = <8>;
+			label = "USB0";
+		};
+
+		rng: rng@42002800 {
+			compatible = "atmel,sam0-trng";
+			reg = <0x42002800 0x1e>;
+			interrupts = <131 0>;
+			label = "ENTROPY_0";
+		};
+
+		rtc: rtc@40002400 {
+			compatible = "atmel,sam0-rtc";
+			reg = <0x40002400 0x1C>;
+			interrupts = <11 0>;
+			clock-generator = <0>;
+			status = "disabled";
+			label = "RTC";
+		};
+
+		adc0: adc@43001C00 {
+			compatible = "atmel,sam0-adc";
+			reg = <0x43001C00 0x4A>;
+			interrupts = <118 0>, <119 0>;
+			label = "ADC_0";
+
+			/*
+			 * 16 MHz max, source clock must not exceed 100 MHz.
+			 *	- table 54-8, section 54.6, page 2020
+			 *	- table 54-24, section 54.10.4, page 2031
+			 * -> 48 MHz GCLK(2) / 4 = 12 MHz
+			 */
+			gclk = <2>;
+			prescaler = <4>;
+			#io-channel-cells = <1>;
+		};
+
+		adc1: adc@43002000 {
+			compatible = "atmel,sam0-adc";
+			reg = <0x43002000 0x4A>;
+			interrupts = <120 0>, <121 0>;
+			label = "ADC_1";
+
+			/*
+			 * 16 MHz max, source clock must not exceed 100 MHz.
+			 *	- table 54-8, section 54.6, page 2020
+			 *	- table 54-24, section 54.10.4, page 2031
+			 * -> 48 MHz GCLK(2) / 4 = 12 MHz
+			 */
+			gclk = <2>;
+			prescaler = <4>;
+			#io-channel-cells = <1>;
+		};
+
+		tc0: tc@40003800 {
+			compatible = "atmel,sam0-tc32";
+			reg = <0x40003800 0x34>;
+			interrupts = <107 0>;
+			label = "TIMER_0";
+		};
+
+		tc2: tc@4101A000 {
+			compatible = "atmel,sam0-tc32";
+			reg = <0x4101A000 0x34>;
+			interrupts = <109 0>;
+			label = "TIMER_2";
+		};
+
+		tc4: tc@42001400 {
+			compatible = "atmel,sam0-tc32";
+			reg = <0x42001400 0x34>;
+			interrupts = <111 0>;
+			label = "TIMER_4";
+		};
+
+		tc6: tc@43001400 {
+			compatible = "atmel,sam0-tc32";
+			reg = <0x43001400 0x34>;
+			interrupts = <113 0>;
+			label = "TIMER_6";
+		};
+	};
+};
+
+&nvic {
+	arm,num-irq-priority-bits = <3>;
+};

dts/arm/atmel/samd5xx18.dtsi

@@ -0,0 +1,18 @@
+/*
+ * Copyright (c) 2019 ML!PA Consulting GmbH
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ */
+
+#include <mem.h>
+#include <atmel/samd5x.dtsi>
+
+/ {
+	flash0: flash@0 {
+		reg = <0x0 DT_SIZE_K(256)>;
+	};
+
+	sram0: memory@20000000 {
+		reg = <0x20000000 DT_SIZE_K(128)>;
+	};
+};

dts/arm/atmel/samd5xx19.dtsi

@@ -0,0 +1,18 @@
+/*
+ * Copyright (c) 2019 ML!PA Consulting GmbH
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ */
+
+#include <mem.h>
+#include <atmel/samd5x.dtsi>
+
+/ {
+	flash0: flash@0 {
+		reg = <0x0 DT_SIZE_K(512)>;
+	};
+
+	sram0: memory@20000000 {
+		reg = <0x20000000 DT_SIZE_K(192)>;
+	};
+};

dts/arm/atmel/samd5xx20.dtsi

@@ -0,0 +1,18 @@
+/*
+ * Copyright (c) 2019 ML!PA Consulting GmbH
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ */
+
+#include <mem.h>
+#include <atmel/samd5x.dtsi>
+
+/ {
+	flash0: flash@0 {
+		reg = <0x0 DT_SIZE_K(1024)>;
+	};
+
+	sram0: memory@20000000 {
+		reg = <0x20000000 DT_SIZE_K(256)>;
+	};
+};

dts/arm/atmel/same5xx18.dtsi

@@ -0,0 +1,7 @@
+/*
+ * Copyright (c) 2019 ML!PA Consulting GmbH
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ */
+
+#include <atmel/samd5xx18.dtsi>