Skip to content

Commit 4a64bfb

Browse files
FRASTMmarwaiehm-st
FRASTM
authored and
marwaiehm-st
committed
boards: st: add the nucleo_wba65ri board
Introduce the stm32WBA56 nucleo board. HSE32 divided by 2 is the source clock. Signed-off-by: Francois Ramu <[email protected]>
1 parent 28e9d09 commit 4a64bfb

File tree

11 files changed

+556
-0
lines changed

11 files changed

+556
-0
lines changed

‎boards/st/nucleo_wba65ri/Kconfig.defconfig‎

Lines changed: 13 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -0,0 +1,13 @@
1+
# STM32WBA65RI Nucleo board configuration
2+
3+
# Copyright (c) 2025 STMicroelectronics
4+
5+
# SPDX-License-Identifier: Apache-2.0
6+
7+
if BOARD_NUCLEO_WBA65RI
8+
9+
config SPI_STM32_INTERRUPT
10+
default y
11+
depends on SPI
12+
13+
endif # BOARD_NUCLEO_WBA65RI

‎boards/st/nucleo_wba65ri/Kconfig.nucleo_wba65ri‎

Lines changed: 5 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -0,0 +1,5 @@
1+
# Copyright (c) 2025 STMicroelectronics
2+
# SPDX-License-Identifier: Apache-2.0
3+
4+
config BOARD_NUCLEO_WBA65RI
5+
select SOC_STM32WBA65XX

‎boards/st/nucleo_wba65ri/arduino_r3_connector.dtsi‎

Lines changed: 39 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -0,0 +1,39 @@
1+
/*
2+
* Copyright (c) 2025 STMicroelectronics
3+
*
4+
* SPDX-License-Identifier: Apache-2.0
5+
*/
6+
7+
/ {
8+
arduino_header: connector {
9+
compatible = "arduino-header-r3";
10+
#gpio-cells = <2>;
11+
gpio-map-mask = <0xffffffff 0xffffffc0>;
12+
gpio-map-pass-thru = <0 0x3f>;
13+
gpio-map = <0 0 &gpioa 4 0>, /* A0 */
14+
<1 0 &gpioa 6 0>, /* A1 */
15+
<2 0 &gpioa 2 0>, /* A2 */
16+
<3 0 &gpioa 1 0>, /* A3 */
17+
<4 0 &gpioa 5 0>, /* A4 */
18+
<5 0 &gpioa 0 0>, /* A5 */
19+
<6 0 &gpioa 11 0>, /* D0 */
20+
<7 0 &gpioa 12 0>, /* D1 */
21+
<8 0 &gpioe 0 0>, /* D2 */
22+
<9 0 &gpiob 13 0>, /* D3 */
23+
<10 0 &gpioa 3 0>, /* D4 */
24+
<11 0 &gpiob 14 0>, /* D5 */
25+
<12 0 &gpiob 0 0>, /* D6 */
26+
<13 0 &gpiod 14 0>, /* D7 */
27+
<14 0 &gpioa 10 0>, /* D8 */
28+
<15 0 &gpiob 11 0>, /* D9 */
29+
<16 0 &gpiob 9 0>, /* D10 */
30+
<17 0 &gpioc 3 0>, /* D11 */
31+
<18 0 &gpioa 9 0>, /* D12 */
32+
<19 0 &gpiob 10 0>, /* D13 */
33+
<20 0 &gpiob 1 0>, /* D14 */
34+
<21 0 &gpiob 2 0>; /* D15 */
35+
};
36+
};
37+
38+
arduino_i2c: &i2c1 {};
39+
arduino_spi: &spi1 {};

‎boards/st/nucleo_wba65ri/board.cmake‎

Lines changed: 4 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -0,0 +1,4 @@
1+
board_runner_args(stm32cubeprogrammer "--port=swd" "--reset-mode=hw")
2+
3+
include(${ZEPHYR_BASE}/boards/common/stm32cubeprogrammer.board.cmake)
4+
include(${ZEPHYR_BASE}/boards/common/openocd.board.cmake)

‎boards/st/nucleo_wba65ri/board.yml‎

Lines changed: 6 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -0,0 +1,6 @@
1+
board:
2+
name: nucleo_wba65ri
3+
full_name: Nucleo WBA65RI
4+
vendor: st
5+
socs:
6+
- name: stm32wba65xx

‎boards/st/nucleo_wba65ri/doc/img/nucleo_wba65ri.webp‎

64.1 KB
Loading

‎boards/st/nucleo_wba65ri/doc/nucleo_wba65ri.rst‎

Lines changed: 248 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -0,0 +1,248 @@
1+
.. zephyr:board:: nucleo_wba65ri
2+
3+
ST Nucleo WBA65RI
4+
#################
5+
6+
Overview
7+
********
8+
9+
NUCLEO-WBA65RI is a Bluetooth® Low Energy, 802.15.4 and Zigbee® wireless
10+
and ultra-low-power board embedding a powerful and ultra-low-power radio
11+
compliant with the Bluetooth® Low Energy SIG specification v5.4
12+
with IEEE 802.15.4-2015 and Zigbee® specifications.
13+
14+
The ARDUINO® Uno V3 connectivity support and the ST morpho headers allow the
15+
easy expansion of the functionality of the STM32 Nucleo open development
16+
platform with a wide choice of specialized shields.
17+
18+
- Ultra-low-power wireless STM32WBA65RI microcontroller based on the Arm®
19+
Cortex®‑M33 core, featuring 2 Mbyte of flash memory and 512 Kbytes of SRAM in
20+
a VFQFPN68 package
21+
22+
- MCU RF board (MB2130):
23+
24+
- 2.4 GHz RF transceiver supporting Bluetooth® specification v5.4
25+
- Arm® Cortex® M33 CPU with TrustZone®, MPU, DSP, and FPU
26+
- Integrated PCB antenna
27+
28+
- Three user LEDs
29+
- Three user and one reset push-buttons
30+
31+
- Board connectors:
32+
33+
- 2 USB Type-C
34+
- ARDUINO® Uno V3 expansion connector
35+
- ST morpho headers for full access to all STM32 I/Os
36+
37+
- Flexible power-supply options: ST-LINK USB VBUS or external sources
38+
- On-board STLINK-V3MODS debugger/programmer with USB re-enumeration capability:
39+
mass storage, Virtual COM port, and debug port
40+
41+
.. image:: img/nucleo_wba65ri.jpg
42+
:align: center
43+
:alt: Nucleo WBA65RI
44+
45+
Hardware
46+
********
47+
48+
The STM32WBA65xx multiprotocol wireless and ultralow power devices embed a
49+
powerful and ultralow power radio compliant with the Bluetooth® SIG Low Energy
50+
specification 5.4. They contain a high-performance Arm Cortex-M33 32-bit RISC
51+
core. They operate at a frequency of up to 100 MHz.
52+
53+
- Includes ST state-of-the-art patented technology
54+
55+
- Ultra low power radio:
56+
57+
- 2.4 GHz radio
58+
- RF transceiver supporting Bluetooth® Low Energy 5.4 specification
59+
IEEE 802.15.4-2015 PHY and MAC, supporting Thread, Matter and Zigbee®
60+
- Proprietary protocols
61+
- RX sensitivity: -96 dBm (Bluetooth® Low Energy at 1 Mbps)
62+
and -100 dBm (IEEE 802.15.4 at 250 kbps)
63+
- Programmable output power, up to +10 dBm with 1 dB steps
64+
- Support for external PA
65+
- Integrated balun to reduce BOM
66+
- Suitable for systems requiring compliance with radio frequency regulations
67+
ETSI EN 300 328, EN 300 440, FCC CFR47 Part 15 and ARIB STD-T66
68+
69+
- Ultra low power platform with FlexPowerControl:
70+
71+
- 1.71 to 3.6 V power supply
72+
- - 40 °C to 85 °C temperature range
73+
- Autonomous peripherals with DMA, functional down to Stop 1 mode
74+
- TBD nA Standby mode (16 wake-up pins)
75+
- TBD nA Standby mode with RTC
76+
- TBD µA Standby mode with 64 KB SRAM
77+
- TBD µA Stop 2 mode with 64 KB SRAM
78+
- TBD µA/MHz Run mode at 3.3 V
79+
- Radio: Rx TBD mA / Tx at 0 dBm TBD mA
80+
81+
- Core: Arm® 32-bit Cortex®-M33 CPU with TrustZone®, MPU, DSP, and FPU
82+
- ART Accelerator™: 8-Kbyte instruction cache allowing 0-wait-state execution
83+
from flash memory (frequency up to 100 MHz, 150 DMIPS)
84+
- Power management: embedded regulator LDO and SMPS step-down converter
85+
- Supporting switch on-the-fly and voltage scaling
86+
87+
- Benchmarks:
88+
89+
- 1.5 DMIPS/MHz (Drystone 2.1)
90+
- 410 CoreMark® (4.10 CoreMark/MHz)
91+
92+
- Clock sources:
93+
94+
- 32 MHz crystal oscillator
95+
- 32 kHz crystal oscillator (LSE)
96+
- Internal low-power 32 kHz (±5%) RC
97+
- Internal 16 MHz factory trimmed RC (±1%)
98+
- PLL for system clock and ADC
99+
100+
- Memories:
101+
102+
- 2 MB flash memory with ECC, including 256 Kbytes with 100 cycles
103+
- 512 KB SRAM, including 64 KB with parity check
104+
- 512-byte (32 rows) OTP
105+
106+
- Rich analog peripherals (independent supply):
107+
108+
- 12-bit ADC 2.5 Msps with hardware oversampling
109+
110+
- Communication peripherals:
111+
112+
- Four UARTs (ISO 7816, IrDA, modem)
113+
- Three SPIs
114+
- Four I2C Fm+ (1 Mbit/s), SMBus/PMBus®
115+
116+
- System peripherals:
117+
118+
- Touch sensing controller, up to 24 sensors, supporting touch key, linear,
119+
rotary touch sensors
120+
- One 16-bit, advanced motor control timer
121+
- Three 16-bit timers
122+
- Two 32-bit timer
123+
- Two low-power 16-bit timers (available in Stop mode)
124+
- Two Systick timers
125+
- RTC with hardware calendar and calibration
126+
- Two watchdogs
127+
- 8-channel DMA controller, functional in Stop mode
128+
129+
- Security and cryptography:
130+
131+
- Arm® TrustZone® and securable I/Os, memories, and peripherals
132+
- Flexible life cycle scheme with RDP and password protected debug
133+
- Root of trust thanks to unique boot entry and secure hide protection area (HDP)
134+
- SFI (secure firmware installation) thanks to embedded RSS (root secure services)
135+
- Secure data storage with root hardware unique key (RHUK)
136+
- Secure firmware upgrade support with TF-M
137+
- Two AES co-processors, including one with DPA resistance
138+
- Public key accelerator, DPA resistant
139+
- HASH hardware accelerator
140+
- True random number generator, NIST SP800-90B compliant
141+
- 96-bit unique ID
142+
- Active tampers
143+
- CRC calculation unit
144+
145+
- Up to 86 I/Os (most of them 5 V-tolerant) with interrupt capability
146+
147+
- Development support:
148+
149+
- Serial wire debug (SWD), JTAG
150+
151+
- ECOPACK2 compliant package
152+
153+
More information about STM32WBA series can be found here:
154+
155+
- `STM32WBA Series on www.st.com`_
156+
157+
Supported Features
158+
==================
159+
160+
.. zephyr:board-supported-hw::
161+
162+
Connections and IOs
163+
===================
164+
165+
Nucleo WBA65RI Board has 4 GPIO controllers. These controllers are responsible for pin muxing,
166+
input/output, pull-up, etc.
167+
168+
Default Zephyr Peripheral Mapping:
169+
----------------------------------
170+
171+
.. rst-class:: rst-columns
172+
173+
- USART_1 TX/RX : PB12/PA8
174+
- I2C_1_SCL : PB2
175+
- I2C_1_SDA : PB1
176+
- USER_PB : PC13
177+
- LD1 : PB4
178+
- SPI_1_NSS : PA12 (arduino_spi)
179+
- SPI_1_SCK : PB4 (arduino_spi)
180+
- SPI_1_MISO : PB3 (arduino_spi)
181+
- SPI_1_MOSI : PA15 (arduino_spi)
182+
183+
System Clock
184+
------------
185+
186+
Nucleo WBA65RI System Clock could be driven by internal or external oscillator,
187+
as well as main PLL clock. By default System clock is driven by HSE+PLL clock at 100MHz.
188+
189+
Serial Port
190+
-----------
191+
192+
Nucleo WBA65RI board has 3 U(S)ARTs. The Zephyr console output is assigned to USART1.
193+
Default settings are 115500 8N1.
194+
195+
196+
Programming and Debugging
197+
*************************
198+
199+
.. zephyr:board-supported-runners::
200+
201+
Nucleo WBA65RI board includes an ST-LINK/V3 embedded debug tool interface.
202+
It could be used for flash and debug using either OpenOCD or STM32Cube ecosystem tools.
203+
204+
Flashing
205+
========
206+
207+
The board is configured to be flashed using west `STM32CubeProgrammer`_ runner,
208+
so its :ref:`installation <stm32cubeprog-flash-host-tools>` is required.
209+
210+
Alternatively, openocd can also be used to flash the board using
211+
the ``--runner`` (or ``-r``) option:
212+
213+
.. code-block:: console
214+
215+
$ west flash --runner openocd
216+
217+
Flashing an application to Nucleo WBA65RI
218+
-----------------------------------------
219+
220+
Here is an example for the :zephyr:code-sample:`blinky` application.
221+
222+
.. zephyr-app-commands::
223+
:zephyr-app: samples/basic/blinky
224+
:board: nucleo_wba65ri
225+
:goals: build flash
226+
227+
You will see the LED blinking every second.
228+
229+
Debugging
230+
=========
231+
232+
Debugging using OpenOCD
233+
-----------------------
234+
235+
You can debug an application in the usual way using OpenOCD. Here is an example for the
236+
:zephyr:code-sample:`blinky` application.
237+
238+
.. zephyr-app-commands::
239+
:zephyr-app: samples/basic/blinky
240+
:board: nucleo_wba65ri
241+
:maybe-skip-config:
242+
:goals: debug
243+
244+
.. _STM32WBA Series on www.st.com:
245+
https://www.st.com/en/microcontrollers-microprocessors/stm32wba-series.html
246+
247+
.. _STM32CubeProgrammer:
248+
https://www.st.com/en/development-tools/stm32cubeprog.html

0 commit comments

Comments
 (0)