44 * SPDX-License-Identifier: Apache-2.0 
55 */ 
66
7- #include  <zephyr/irq.h> 
87#include  <zephyr/kernel.h> 
9- #include  <zephyr/arch/cpu.h> 
10- #include  <zephyr/sys/util.h> 
118#include  <zephyr/drivers/entropy.h> 
129#include  <zephyr/logging/log.h> 
13- #include  <cmsis_core.h> 
14- 
15- #include  <linklayer_plat_local.h> 
16- 
17- #include  <stm32_ll_pwr.h> 
1810
1911#include  "scm.h" 
2012
2113#define  LOG_LEVEL  CONFIG_SOC_LOG_LEVEL
22- LOG_MODULE_REGISTER (linklayer_plat );
14+ LOG_MODULE_REGISTER (linklayer_plat_adapt );
2315
2416#define  RADIO_INTR_PRIO_HIGH_Z  (RADIO_INTR_PRIO_HIGH + _IRQ_PRIO_OFFSET)
2517#define  RADIO_INTR_PRIO_LOW_Z  (RADIO_INTR_PRIO_LOW + _IRQ_PRIO_OFFSET)
@@ -36,52 +28,17 @@ extern const struct device *rng_dev;
3628volatile  int32_t  prio_high_isr_counter ;
3729volatile  int32_t  prio_low_isr_counter ;
3830volatile  int32_t  prio_sys_isr_counter ;
39- volatile  int32_t  irq_counter ;
4031volatile  uint32_t  local_basepri_value ;
4132
4233/* Radio SW low ISR global variable */ 
4334volatile  uint8_t  radio_sw_low_isr_is_running_high_prio ;
4435
45- void  LINKLAYER_PLAT_ClockInit (void )
46- {
47- 	LL_PWR_EnableBkUpAccess ();
48- 
49- 	/* Select LSE as Sleep CLK */ 
50- 	__HAL_RCC_RADIOSLPTIM_CONFIG (RCC_RADIOSTCLKSOURCE_LSE );
51- 
52- 	LL_PWR_DisableBkUpAccess ();
53- 
54- 	/* Enable AHB5ENR peripheral clock (bus CLK) */ 
55- 	__HAL_RCC_RADIO_CLK_ENABLE ();
56- }
5736
5837void  LINKLAYER_PLAT_DelayUs (uint32_t  delay )
5938{
6039	k_busy_wait (delay );
6140}
6241
63- void  LINKLAYER_PLAT_WaitHclkRdy (void )
64- {
65- 	while  (HAL_RCCEx_GetRadioBusClockReadiness () !=  RCC_RADIO_BUS_CLOCK_READY ) {
66- 	}
67- }
68- 
69- void  LINKLAYER_PLAT_AclkCtrl (uint8_t  enable )
70- {
71- 	LOG_DBG ("enable: %d" , enable );
72- 	if  (enable ) {
73- 		/* Enable RADIO baseband clock (active CLK) */ 
74- 		HAL_RCCEx_EnableRadioBBClock ();
75- 
76- 		/* Polling on HSE32 activation */ 
77- 		while  (LL_RCC_HSE_IsReady () ==  0 ) {
78- 		}
79- 	} else  {
80- 		/* Disable RADIO baseband clock (active CLK) */ 
81- 		HAL_RCCEx_DisableRadioBBClock ();
82- 	}
83- }
84- 
8542void  LINKLAYER_PLAT_GetRNG (uint8_t  * ptr_rnd , uint32_t  len )
8643{
8744	int  ret ;
@@ -191,22 +148,6 @@ void LINKLAYER_PLAT_TriggerSwLowIT(uint8_t priority)
191148	NVIC_SetPendingIRQ ((IRQn_Type )RADIO_SW_LOW_INTR_NUM );
192149}
193150
194- void  LINKLAYER_PLAT_EnableIRQ (void )
195- {
196- 	irq_counter  =  MAX (0 , irq_counter  -  1 );
197- 
198- 	if  (irq_counter  ==  0 ) {
199- 		__enable_irq ();
200- 	}
201- }
202- 
203- void  LINKLAYER_PLAT_DisableIRQ (void )
204- {
205- 	__disable_irq ();
206- 
207- 	irq_counter ++ ;
208- }
209- 
210151void  LINKLAYER_PLAT_Assert (uint8_t  condition )
211152{
212153	__ASSERT_NO_MSG (condition );
@@ -267,16 +208,6 @@ void LINKLAYER_PLAT_DisableSpecificIRQ(uint8_t isr_type)
267208	}
268209}
269210
270- void  LINKLAYER_PLAT_EnableRadioIT (void )
271- {
272- 	irq_enable ((IRQn_Type )RADIO_INTR_NUM );
273- }
274- 
275- void  LINKLAYER_PLAT_DisableRadioIT (void )
276- {
277- 	irq_disable ((IRQn_Type )RADIO_INTR_NUM );
278- }
279- 
280211void  LINKLAYER_PLAT_StartRadioEvt (void )
281212{
282213	__HAL_RCC_RADIO_CLK_SLEEP_ENABLE ();
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