drivers: serial: nrfx: Add new shim based on nrfx_uarte

Add new shim which is based on nrfx driver.

Legacy shim is kept for transition period. It can be used after
setting CONFIG_UART_NRFX_UARTE_LEGACY_SHIM.

Signed-off-by: Krzysztof Chruściński <[email protected]>

Author: nordic-krch

drivers/serial/CMakeLists.txt

@@ -26,7 +26,13 @@ zephyr_library_sources_ifdef(CONFIG_UART_MIV uart_miv.c)
 zephyr_library_sources_ifdef(CONFIG_UART_MSP432P4XX uart_msp432p4xx.c)
 zephyr_library_sources_ifdef(CONFIG_UART_NS16550 uart_ns16550.c)
 zephyr_library_sources_ifdef(CONFIG_UART_NRFX_UART uart_nrfx_uart.c)
-zephyr_library_sources_ifdef(CONFIG_UART_NRFX_UARTE uart_nrfx_uarte.c)
+if (CONFIG_UART_NRFX_UARTE)
+  if (CONFIG_UART_NRFX_UARTE_LEGACY_SHIM)
+    zephyr_library_sources(uart_nrfx_uarte.c)
+  else()
+    zephyr_library_sources(uart_nrfx_uarte2.c)
+  endif()
+endif()
 zephyr_library_sources_ifdef(CONFIG_UART_NUMICRO uart_numicro.c)
 zephyr_library_sources_ifdef(CONFIG_UART_SAM uart_sam.c)
 zephyr_library_sources_ifdef(CONFIG_USART_SAM usart_sam.c)

drivers/serial/Kconfig.nrfx

@@ -25,11 +25,20 @@ config UART_NRFX_UART
 config UART_NRFX_UARTE
 	def_bool y
 	depends on DT_HAS_NORDIC_NRF_UARTE_ENABLED
+	imply NRFX_UARTE_CONFIG_SKIP_PSEL_CONFIG if !UART_NRFX_UARTE_LEGACY_SHIM
+	imply NRFX_UARTE_CONFIG_SKIP_GPIO_CONFIG if !UART_NRFX_UARTE_LEGACY_SHIM
+
+config UART_NRFX_UARTE_LEGACY_SHIM
+	bool "Legacy UARTE shim"
+	depends on UART_NRFX_UARTE
+	# New shim takes more ROM. Until it is fixed use legacy shim in memory
+	# constraint case.
+	default y if MCUBOOT
 
 config UART_ASYNC_TX_CACHE_SIZE
 	int "TX cache buffer size"
 	depends on UART_ASYNC_API
-	depends on UART_NRFX_UARTE
+	depends on UART_NRFX_UARTE_LEGACY_SHIM
 	default 8
 	help
 	  For UARTE, TX cache buffer is used when provided TX buffer is not located

drivers/serial/Kconfig.nrfx_uart_instance

@@ -6,6 +6,7 @@
 config UART_$(nrfx_uart_num)_INTERRUPT_DRIVEN
 	bool "Interrupt support on port $(nrfx_uart_num)"
 	depends on UART_INTERRUPT_DRIVEN
+	select UART_ASYNC_TO_INT_DRIVEN_API if !UART_NRFX_UARTE_LEGACY_SHIM
 	default y
 	help
 	  This option enables UART interrupt support on port $(nrfx_uart_num).
@@ -27,14 +28,18 @@ config UART_$(nrfx_uart_num)_ENHANCED_POLL_OUT
 	  When enabled, polling out does not trigger interrupt which stops TX.
 	  Feature uses a PPI channel.
 
+config NRFX_UARTE$(nrfx_uart_num)
+	def_bool y if HAS_HW_NRF_UARTE$(nrfx_uart_num) && !UART_NRFX_UARTE_LEGACY_SHIM
+
 config UART_$(nrfx_uart_num)_NRF_PARITY_BIT
 	bool "Parity bit"
 	help
 	  Enable parity bit.
 
 config UART_$(nrfx_uart_num)_NRF_TX_BUFFER_SIZE
 	int "Size of RAM buffer"
-	depends on UART_INTERRUPT_DRIVEN
+	depends on HAS_HW_NRF_UARTE$(nrfx_uart_num)
+	depends on UART_NRFX_UARTE_LEGACY_SHIM
 	range 1 65535
 	default 32
 	help
@@ -46,6 +51,7 @@ config UART_$(nrfx_uart_num)_NRF_HW_ASYNC
 	bool "Use hardware RX byte counting"
 	depends on HAS_HW_NRF_UARTE$(nrfx_uart_num)
 	depends on UART_ASYNC_API
+	depends on UART_NRFX_UARTE_LEGACY_SHIM
 	select NRFX_PPI if HAS_HW_NRF_PPI
 	select NRFX_DPPI if HAS_HW_NRF_DPPIC
 	help
@@ -58,6 +64,7 @@ config UART_$(nrfx_uart_num)_NRF_ASYNC_LOW_POWER
 	bool "Low power mode"
 	depends on HAS_HW_NRF_UARTE$(nrfx_uart_num)
 	depends on UART_ASYNC_API
+	depends on UART_NRFX_UARTE_LEGACY_SHIM
 	help
 	  When enabled, UARTE is enabled before each TX or RX usage and disabled
 	  when not used. Disabling UARTE while in idle allows to achieve lowest
@@ -67,6 +74,42 @@ config UART_$(nrfx_uart_num)_NRF_HW_ASYNC_TIMER
 	int "Timer instance"
 	depends on UART_$(nrfx_uart_num)_NRF_HW_ASYNC
 
+config UART_$(nrfx_uart_num)_TX_CACHE_SIZE
+	int "TX cache buffer size"
+	depends on !UART_NRFX_UARTE_LEGACY_SHIM
+	default 8
+	help
+	  For UARTE, TX cache buffer is used when provided TX buffer is not located
+	  in memory which can be used by the EasyDMA.
+
+config UART_$(nrfx_uart_num)_RX_CACHE_SIZE
+	int "RX cache buffer size"
+	depends on !UART_NRFX_UARTE_LEGACY_SHIM
+	default 32 if $(dt_nodelabel_has_compat,ram3x,$(DT_COMPAT_MMIO_SRAM))
+	default 5
+	range 5 255
+	help
+	  For UARTE, RX cache buffer is used when provided RX buffer is not located
+	  in memory which can be used by the EasyDMA. It is also used to store
+	  flushed data.
+
+config UART_$(nrfx_uart_num)_A2I_RX_SIZE
+	depends on !UART_NRFX_UARTE_LEGACY_SHIM
+	int "Asynchronous to interrupt driven adaptation layer RX buffer size"
+	default 64 if UART_$(nrfx_uart_num)_INTERRUPT_DRIVEN
+	default 0
+	help
+	  Amount of space dedicated for RX. It is divided into chunks with some
+	  amount of that space used for control data.
+
+config UART_$(nrfx_uart_num)_A2I_RX_BUF_COUNT
+	depends on !UART_NRFX_UARTE_LEGACY_SHIM
+	int "Asynchronous to interrupt driven adaptation layer RX buffer count"
+	default 8 if UART_$(nrfx_uart_num)_INTERRUPT_DRIVEN
+	default 0
+	help
+	  Number of chunks into RX space is divided.
+
 config UART_$(nrfx_uart_num)_GPIO_MANAGEMENT
 	bool "GPIO management on port $(nrfx_uart_num)"
 	depends on PM_DEVICE