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Andrew BoieAnas Nashif
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arm: fix k_oops on armv6 with interrupts locked
Calling 'svc' on ARMv6 causes a hard fault if interrups are locked. Force them unlocked before making the svc call. Signed-off-by: Andrew Boie <[email protected]>
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include/arch/arm/cortex_m/error.h

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@@ -35,6 +35,21 @@ extern void _SysFatalErrorHandler(unsigned int reason, const NANO_ESF *esf);
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#define _SVC_CALL_IRQ_OFFLOAD 1
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#define _SVC_CALL_RUNTIME_EXCEPT 2
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#if defined(CONFIG_ARMV6_M)
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/* ARMv6 will hard-fault if SVC is called with interrupts locked. Just
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* force them unlocked, the thread is in an undefined state anyway
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*/
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#define _ARCH_EXCEPT(reason_p) do { \
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__asm__ volatile ( \
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"cpsie i\n\t" \
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"mov r0, %[reason]\n\t" \
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"svc %[id]\n\t" \
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: \
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: [reason] "i" (reason_p), [id] "i" (_SVC_CALL_RUNTIME_EXCEPT) \
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: "memory"); \
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CODE_UNREACHABLE; \
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} while (0)
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#elif defined(CONFIG_ARMV7_M)
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#define _ARCH_EXCEPT(reason_p) do { \
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__asm__ volatile ( \
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"mov r0, %[reason]\n\t" \
@@ -44,6 +59,9 @@ extern void _SysFatalErrorHandler(unsigned int reason, const NANO_ESF *esf);
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: "memory"); \
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CODE_UNREACHABLE; \
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} while (0)
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#else
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#error Unknown ARM architecture
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#endif /* CONFIG_ARMV6_M */
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#ifdef __cplusplus
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}

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