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pdgendtMaureenHelm
pdgendt
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MaureenHelm
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drivers: counter: NXP SNVS rtc: Add support for NXP imx SNVS RTC
Adds a driver using the SNVS high power and optionally low power RTC instances. A device specific function `mcux_snvs_rtc_set` is provided to update the current counter value. Signed-off-by: Pieter De Gendt <[email protected]>
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10 files changed

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‎drivers/counter/CMakeLists.txt‎

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@@ -16,6 +16,7 @@ zephyr_library_sources_ifdef(CONFIG_COUNTER_SAM_TC counter_sam_tc.c
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zephyr_library_sources_ifdef(CONFIG_COUNTER_SAM0_TC32 counter_sam0_tc32.c)
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zephyr_library_sources_ifdef(CONFIG_COUNTER_CMOS counter_cmos.c)
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zephyr_library_sources_ifdef(CONFIG_COUNTER_MCUX_GPT counter_mcux_gpt.c)
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zephyr_library_sources_ifdef(CONFIG_COUNTER_MCUX_SNVS counter_mcux_snvs.c)
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zephyr_library_sources_ifdef(CONFIG_COUNTER_XEC counter_mchp_xec.c)
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zephyr_library_sources_ifdef(CONFIG_COUNTER_MCUX_LPTMR counter_mcux_lptmr.c)
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zephyr_library_sources_ifdef(CONFIG_COUNTER_MAXIM_DS3231 maxim_ds3231.c)

‎drivers/counter/Kconfig‎

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@@ -44,6 +44,8 @@ source "drivers/counter/Kconfig.cmos"
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source "drivers/counter/Kconfig.mcux_gpt"
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source "drivers/counter/Kconfig.mcux_snvs"
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source "drivers/counter/Kconfig.xec"
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source "drivers/counter/Kconfig.mcux_lptmr"

‎drivers/counter/Kconfig.mcux_snvs‎

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@@ -0,0 +1,24 @@
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# MCUXpresso SDK SNVS (Secure) RTC
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# Copyright (c) 2021 Basalte bv
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# SPDX-License-Identifier: Apache-2.0
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config COUNTER_MCUX_SNVS
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bool "IMX SNVS RTC driver"
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depends on HAS_MCUX_SNVS
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help
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Enable support for the IMX SNVS High/Low Power clock.
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config COUNTER_MCUX_SNVS_SRTC
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bool "IMX SNVS SRTC low power support"
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depends on COUNTER_MCUX_SNVS
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default y
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help
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Enable the low power SRTC in SNVS to synchronise.
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config COUNTER_MCUX_SNVS_SRTC_WAKE
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bool "IMX SNVS wake-up on SRTC alarm"
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depends on COUNTER_MCUX_SNVS_SRTC
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default y
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help
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Assert Wake-Up Interrupt on SRTC alarm

‎drivers/counter/counter_mcux_snvs.c‎

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/*
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* Copyright (c) 2021 Basalte bv
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*
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* SPDX-License-Identifier: Apache-2.0
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*/
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#define DT_DRV_COMPAT nxp_imx_snvs_rtc
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#include <logging/log.h>
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LOG_MODULE_REGISTER(mcux_snvs, CONFIG_COUNTER_LOG_LEVEL);
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#if CONFIG_COUNTER_MCUX_SNVS_SRTC
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#define MCUX_SNVS_SRTC
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#define MCUX_SNVS_NUM_CHANNELS 2
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#else
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#define MCUX_SNVS_NUM_CHANNELS 1
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#endif
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#include <drivers/counter.h>
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#include <fsl_snvs_hp.h>
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#ifdef MCUX_SNVS_SRTC
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#include <fsl_snvs_lp.h>
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#endif
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struct mcux_snvs_config {
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/* info must be first element */
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struct counter_config_info info;
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SNVS_Type *base;
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void (*irq_config_func)(const struct device *dev);
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};
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struct mcux_snvs_data {
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counter_alarm_callback_t alarm_hp_rtc_callback;
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void *alarm_hp_rtc_user_data;
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#ifdef MCUX_SNVS_SRTC
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counter_alarm_callback_t alarm_lp_srtc_callback;
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void *alarm_lp_srtc_user_data;
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#endif
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};
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static int mcux_snvs_start(const struct device *dev)
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{
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ARG_UNUSED(dev);
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return -EALREADY;
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}
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static int mcux_snvs_stop(const struct device *dev)
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{
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ARG_UNUSED(dev);
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return -ENOTSUP;
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}
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static int mcux_snvs_get_value(const struct device *dev, uint32_t *ticks)
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{
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const struct mcux_snvs_config *config = dev->config;
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uint32_t tmp = 0;
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do {
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*ticks = tmp;
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tmp = (config->base->HPRTCMR << 17U);
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tmp |= (config->base->HPRTCLR >> 15U);
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} while (*ticks != tmp);
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return 0;
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}
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static int mcux_snvs_set_alarm(const struct device *dev,
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uint8_t chan_id,
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const struct counter_alarm_cfg *alarm_cfg)
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{
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const struct mcux_snvs_config *config = dev->config;
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struct mcux_snvs_data *data = dev->data;
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uint32_t current, ticks;
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mcux_snvs_get_value(dev, &current);
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ticks = alarm_cfg->ticks;
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if ((alarm_cfg->flags & COUNTER_ALARM_CFG_ABSOLUTE) == 0) {
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ticks += current;
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}
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if (ticks < current) {
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LOG_ERR("Invalid alarm ticks");
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return -EINVAL;
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}
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if (chan_id == 0) {
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if (data->alarm_hp_rtc_callback) {
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return -EBUSY;
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}
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data->alarm_hp_rtc_callback = alarm_cfg->callback;
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data->alarm_hp_rtc_user_data = alarm_cfg->user_data;
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/* disable RTC alarm interrupt */
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config->base->HPCR &= ~SNVS_HPCR_HPTA_EN_MASK;
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while ((config->base->HPCR & SNVS_HPCR_HPTA_EN_MASK) != 0U) {
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}
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/* Set alarm in seconds*/
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config->base->HPTAMR = (uint32_t)(ticks >> 17U);
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config->base->HPTALR = (uint32_t)(ticks << 15U);
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/* enable RTC alarm interrupt */
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config->base->HPCR |= SNVS_HPCR_HPTA_EN_MASK;
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#ifdef MCUX_SNVS_SRTC
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} else if (chan_id == 1) {
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if (data->alarm_lp_srtc_callback) {
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return -EBUSY;
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}
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data->alarm_lp_srtc_callback = alarm_cfg->callback;
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data->alarm_lp_srtc_user_data = alarm_cfg->user_data;
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/* disable SRTC alarm interrupt */
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config->base->LPCR &= ~SNVS_LPCR_LPTA_EN_MASK;
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while ((config->base->LPCR & SNVS_LPCR_LPTA_EN_MASK) != 0U) {
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}
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/* Set alarm in seconds*/
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config->base->LPTAR = ticks;
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/* enable SRTC alarm interrupt */
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config->base->LPCR |= SNVS_LPCR_LPTA_EN_MASK;
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#endif
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} else {
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LOG_ERR("Invalid channel id");
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return -EINVAL;
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}
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return 0;
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}
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static int mcux_snvs_cancel_alarm(const struct device *dev,
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uint8_t chan_id)
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{
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const struct mcux_snvs_config *config = dev->config;
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struct mcux_snvs_data *data = dev->data;
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if (chan_id == 0) {
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/* disable RTC alarm interrupt */
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config->base->HPCR &= ~SNVS_HPCR_HPTA_EN_MASK;
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while ((config->base->HPCR & SNVS_HPCR_HPTA_EN_MASK) != 0U) {
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}
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/* clear callback */
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data->alarm_hp_rtc_callback = NULL;
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#ifdef MCUX_SNVS_SRTC
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} else if (chan_id == 1) {
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/* disable SRTC alarm interrupt */
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config->base->LPCR &= ~SNVS_LPCR_LPTA_EN_MASK;
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while ((config->base->LPCR & SNVS_LPCR_LPTA_EN_MASK) != 0U) {
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}
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/* clear callback */
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data->alarm_lp_srtc_callback = NULL;
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#endif
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} else {
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LOG_ERR("Invalid channel id");
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return -EINVAL;
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}
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return 0;
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}
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static int mcux_snvs_set_top_value(const struct device *dev,
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const struct counter_top_cfg *cfg)
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{
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ARG_UNUSED(dev);
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ARG_UNUSED(cfg);
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return -ENOTSUP;
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}
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static uint32_t mcux_snvs_get_pending_int(const struct device *dev)
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{
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const struct mcux_snvs_config *config = dev->config;
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uint32_t flags;
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flags = SNVS_HP_RTC_GetStatusFlags(config->base) & kSNVS_RTC_AlarmInterruptFlag;
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#ifdef MCUX_SNVS_SRTC
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flags |= SNVS_LP_SRTC_GetStatusFlags(config->base) & kSNVS_SRTC_AlarmInterruptFlag;
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#endif
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return flags;
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}
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static uint32_t mcux_snvs_get_top_value(const struct device *dev)
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{
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ARG_UNUSED(dev);
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return UINT32_MAX;
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}
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void mcux_snvs_isr(const struct device *dev)
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{
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const struct mcux_snvs_config *config = dev->config;
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struct mcux_snvs_data *data = dev->data;
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uint32_t current;
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mcux_snvs_get_value(dev, &current);
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if (SNVS_HP_RTC_GetStatusFlags(config->base) & kSNVS_RTC_AlarmInterruptFlag) {
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/* Clear alarm flag */
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SNVS_HP_RTC_ClearStatusFlags(config->base, kSNVS_RTC_AlarmInterruptFlag);
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if (data->alarm_hp_rtc_callback) {
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data->alarm_hp_rtc_callback(dev, 0, current, data->alarm_hp_rtc_user_data);
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mcux_snvs_cancel_alarm(dev, 0);
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}
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}
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#ifdef MCUX_SNVS_SRTC
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if (SNVS_LP_SRTC_GetStatusFlags(config->base) & kSNVS_SRTC_AlarmInterruptFlag) {
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/* Clear alarm flag */
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SNVS_LP_SRTC_ClearStatusFlags(config->base, kSNVS_SRTC_AlarmInterruptFlag);
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if (data->alarm_lp_srtc_callback) {
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data->alarm_lp_srtc_callback(dev, 1, current,
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data->alarm_lp_srtc_user_data);
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mcux_snvs_cancel_alarm(dev, 1);
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}
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}
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#endif
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}
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int mcux_snvs_rtc_set(const struct device *dev, uint32_t ticks)
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{
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const struct mcux_snvs_config *config = dev->config;
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#ifdef MCUX_SNVS_SRTC
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SNVS_LP_SRTC_StopTimer(config->base);
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config->base->LPSRTCMR = (uint32_t)(ticks >> 17U);
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config->base->LPSRTCLR = (uint32_t)(ticks << 15U);
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SNVS_LP_SRTC_StartTimer(config->base);
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/* Sync to our high power RTC */
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SNVS_HP_RTC_TimeSynchronize(config->base);
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#else
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SNVS_HP_RTC_StopTimer(config->base);
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config->base->HPRTCMR = (uint32_t)(ticks >> 17U);
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config->base->HPRTCLR = (uint32_t)(ticks << 15U);
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SNVS_HP_RTC_StartTimer(config->base);
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#endif
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return 0;
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}
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static int mcux_snvs_init(const struct device *dev)
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{
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const struct mcux_snvs_config *config = dev->config;
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snvs_hp_rtc_config_t hp_rtc_config;
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#ifdef MCUX_SNVS_SRTC
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snvs_lp_srtc_config_t lp_srtc_config;
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#endif
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SNVS_HP_RTC_GetDefaultConfig(&hp_rtc_config);
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SNVS_HP_RTC_Init(config->base, &hp_rtc_config);
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#ifdef MCUX_SNVS_SRTC
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/* Reset power glitch detector */
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SNVS_LP_Init(config->base);
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/* Init SRTC to default config */
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SNVS_LP_SRTC_GetDefaultConfig(&lp_srtc_config);
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SNVS_LP_SRTC_Init(config->base, &lp_srtc_config);
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#if CONFIG_COUNTER_MCUX_SNVS_SRTC_WAKE
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config->base->LPCR |= SNVS_LPCR_LPWUI_EN_MASK;
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#endif
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/* RTC should always run */
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SNVS_LP_SRTC_StartTimer(config->base);
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SNVS_HP_RTC_TimeSynchronize(config->base);
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#endif
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/* RTC should always run */
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SNVS_HP_RTC_StartTimer(config->base);
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config->irq_config_func(dev);
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return 0;
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}
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static const struct counter_driver_api mcux_snvs_driver_api = {
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.start = mcux_snvs_start,
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.stop = mcux_snvs_stop,
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.get_value = mcux_snvs_get_value,
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.set_alarm = mcux_snvs_set_alarm,
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.cancel_alarm = mcux_snvs_cancel_alarm,
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.set_top_value = mcux_snvs_set_top_value,
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.get_pending_int = mcux_snvs_get_pending_int,
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.get_top_value = mcux_snvs_get_top_value,
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};
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/*
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* This driver is single-instance. If the devicetree contains multiple
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* instances, this will fail and the driver needs to be revisited.
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*/
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BUILD_ASSERT(DT_NUM_INST_STATUS_OKAY(DT_DRV_COMPAT) <= 1,
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"unsupported snvs instance");
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#if DT_NODE_HAS_STATUS(DT_DRV_INST(0), okay)
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static struct mcux_snvs_data mcux_snvs_data_0;
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static void mcux_snvs_irq_config_0(const struct device *dev);
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static struct mcux_snvs_config mcux_snvs_config_0 = {
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.info = {
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.max_top_value = 0,
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.freq = 1,
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.channels = MCUX_SNVS_NUM_CHANNELS,
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.flags = COUNTER_CONFIG_INFO_COUNT_UP,
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},
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.base = (SNVS_Type *)DT_REG_ADDR(DT_PARENT(DT_DRV_INST(0))),
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.irq_config_func = mcux_snvs_irq_config_0,
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};
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DEVICE_DT_INST_DEFINE(0, &mcux_snvs_init, NULL,
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&mcux_snvs_data_0,
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&mcux_snvs_config_0,
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POST_KERNEL, CONFIG_COUNTER_INIT_PRIORITY,
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&mcux_snvs_driver_api);
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static void mcux_snvs_irq_config_0(const struct device *dev)
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{
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IRQ_CONNECT(DT_INST_IRQN(0), DT_INST_IRQ(0, priority),
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mcux_snvs_isr, DEVICE_DT_INST_GET(0), 0);
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irq_enable(DT_INST_IRQN(0));
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}
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#endif /* DT_NODE_HAS_STATUS(DT_DRV_INST(0), okay) */

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