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drivers: memc: Fix various APS6404 device issues
This commit deals with fixing various issues that prevents the device from being built. In specific: 1. Fix default timing macro definitions to build with an MSPI controller, other than AMBIG. Add macro definition for MSPI_PORT. 2. Timing settings should be applied only when MSPI_TIMING is defined. Otherwise, the APS6404 initialization routine will fail with -EIO. 3. Similarly, use MSPI_XIP and MSPI_SCRAMBLE to apply XIP and SCRAMBLE device settings, respectively (optimization). 4. MEMC_INIT_PRIORITY is assigned higher priority than MSPI_INIT_PRIORITY which results in compiler error as APS6404 device initialization depends on its underlying MSPI bus controller. 5. The 'acquire' subroutine should be compiled when PM_DEVICE is used (suppress compiler warning). Signed-off-by: Ioannis Karachalios <[email protected]>
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-2
lines changed

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drivers/memc/Kconfig

Lines changed: 1 addition & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -13,6 +13,7 @@ if MEMC
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1414
config MEMC_INIT_PRIORITY
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int "Initialization priority"
16+
default 80 if MSPI
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default 0
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help
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Memory controllers initialization priority.

drivers/memc/memc_mspi_aps6404l.c

Lines changed: 11 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -135,6 +135,7 @@ static int memc_mspi_aps6404l_command_read(const struct device *psram, uint8_t c
135135
return ret;
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}
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138+
#if CONFIG_PM_DEVICE
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static void acquire(const struct device *psram)
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{
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const struct memc_mspi_aps6404l_config *cfg = psram->config;
@@ -154,6 +155,7 @@ static void acquire(const struct device *psram)
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}
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}
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}
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#endif /* CONFIG_PM_DEVICE */
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static void release(const struct device *psram)
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{
@@ -341,28 +343,34 @@ static int memc_mspi_aps6404l_init(const struct device *psram)
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}
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data->dev_cfg = cfg->tar_dev_cfg;
343345

346+
#if CONFIG_MSPI_TIMING
344347
if (mspi_timing_config(cfg->bus, &cfg->dev_id, cfg->timing_cfg_mask,
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(void *)&cfg->tar_timing_cfg)) {
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LOG_ERR("Failed to config mspi timing/%u", __LINE__);
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return -EIO;
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}
349352
data->timing_cfg = cfg->tar_timing_cfg;
353+
#endif /* CONFIG_MSPI_TIMING */
350354

355+
#if CONFIG_MSPI_XIP
351356
if (cfg->tar_xip_cfg.enable) {
352357
if (mspi_xip_config(cfg->bus, &cfg->dev_id, &cfg->tar_xip_cfg)) {
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LOG_ERR("Failed to enable XIP/%u", __LINE__);
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return -EIO;
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}
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data->xip_cfg = cfg->tar_xip_cfg;
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}
363+
#endif /* CONFIG_MSPI_XIP */
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365+
#if CONFIG_MSPI_SCRAMBLE
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if (cfg->tar_scramble_cfg.enable) {
360367
if (mspi_scramble_config(cfg->bus, &cfg->dev_id, &cfg->tar_scramble_cfg)) {
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LOG_ERR("Failed to enable scrambling/%u", __LINE__);
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return -EIO;
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}
364371
data->scramble_cfg = cfg->tar_scramble_cfg;
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}
373+
#endif /* MSPI_SCRAMBLE */
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release(psram);
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@@ -423,8 +431,9 @@ static int memc_mspi_aps6404l_init(const struct device *psram)
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}
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#define MSPI_TIMING_CONFIG_MASK(n) DT_INST_PROP(n, ambiq_timing_config_mask)
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#else
426-
#define MSPI_TIMING_CONFIG(n)
427-
#define MSPI_TIMING_CONFIG_MASK(n)
434+
#define MSPI_TIMING_CONFIG(n) {}
435+
#define MSPI_TIMING_CONFIG_MASK(n) MSPI_TIMING_PARAM_DUMMY
436+
#define MSPI_PORT(n) 0
428437
#endif
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430439
#define MEMC_MSPI_APS6404L(n) \

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