drivers: ethernet: xlnx_gem: invert RX/TX checksum offload behaviour

Invert the RX/TX checksum offloading to hardware behaviour so that
hardware checksum generation / evaluation for TCP/UDP packets on
either IPv4 or IPv6 is enabled by default, but can be disabled
explicitly.

This behaviour, which should optimize network performance, has
become possible with the implementation of the device driver's
get_config function, indicating to the network stack that HW
checksum offloading is not supported for, e.g., ICMP packets.
Before this implementation, enabling the HW checksum offloading
resulted in invalid packets for any unsupported protocol and
could therefore not be enabled by default.

For QEMU, which does not support the emulation of the HW
checksum offloading, automatically disable the offloading.

Signed-off-by: Immo Birnbaum <[email protected]>

Author: ibirnbaum

drivers/ethernet/eth_xlnx_gem.c

@@ -37,6 +37,12 @@
 #include <zephyr/logging/log.h>
 LOG_MODULE_REGISTER(LOG_MODULE_NAME);
 
+#if CONFIG_QEMU_TARGET ||\
+	DT_ANY_INST_HAS_BOOL_STATUS_OKAY(disable_rx_checksum_offload) ||\
+	DT_ANY_INST_HAS_BOOL_STATUS_OKAY(disable_tx_checksum_offload)
+#warning "xlnx_gem: at least one instance has checksum offloading to hardware disabled"
+#endif
+
 static int  eth_xlnx_gem_dev_init(const struct device *dev);
 static void eth_xlnx_gem_iface_init(struct net_if *iface);
 static void eth_xlnx_gem_isr(const struct device *dev);
@@ -181,16 +187,6 @@ static int eth_xlnx_gem_dev_init(const struct device *dev)
 		 "must be 16380 bytes maximum.", dev->name,
 		 dev_conf->tx_buffer_size);
 
-	/* Checksum offloading limitations of the QEMU GEM implementation */
-#ifdef CONFIG_QEMU_TARGET
-	__ASSERT(!dev_conf->enable_rx_chksum_offload,
-		 "TCP/UDP/IP hardware checksum offloading is not "
-		 "supported by the QEMU GEM implementation");
-	__ASSERT(!dev_conf->enable_tx_chksum_offload,
-		 "TCP/UDP/IP hardware checksum offloading is not "
-		 "supported by the QEMU GEM implementation");
-#endif
-
 	/*
 	 * Initialization procedure as described in the Zynq-7000 TRM,
 	 * chapter 16.3.x.
@@ -641,11 +637,11 @@ static enum ethernet_hw_caps eth_xlnx_gem_get_capabilities(
 		caps |= ETHERNET_LINK_10BASE;
 	}
 
-	if (dev_conf->enable_rx_chksum_offload) {
+	if (!dev_conf->disable_rx_chksum_offload) {
 		caps |= ETHERNET_HW_RX_CHKSUM_OFFLOAD;
 	}
 
-	if (dev_conf->enable_tx_chksum_offload) {
+	if (!dev_conf->disable_tx_chksum_offload) {
 		caps |= ETHERNET_HW_TX_CHKSUM_OFFLOAD;
 	}
 
@@ -682,7 +678,7 @@ static int eth_xlnx_gem_get_config(const struct device *dev,
 
 	switch (type) {
 	case ETHERNET_CONFIG_TYPE_RX_CHECKSUM_SUPPORT:
-		if (dev_conf->enable_rx_chksum_offload) {
+		if (!dev_conf->disable_rx_chksum_offload) {
 			config->chksum_support = ETHERNET_CHECKSUM_SUPPORT_IPV4_HEADER |
 						 ETHERNET_CHECKSUM_SUPPORT_IPV6_HEADER |
 						 ETHERNET_CHECKSUM_SUPPORT_TCP |
@@ -692,7 +688,7 @@ static int eth_xlnx_gem_get_config(const struct device *dev,
 		}
 		return 0;
 	case ETHERNET_CONFIG_TYPE_TX_CHECKSUM_SUPPORT:
-		if (dev_conf->enable_tx_chksum_offload) {
+		if (!dev_conf->disable_tx_chksum_offload) {
 			config->chksum_support = ETHERNET_CHECKSUM_SUPPORT_IPV4_HEADER |
 						 ETHERNET_CHECKSUM_SUPPORT_IPV6_HEADER |
 						 ETHERNET_CHECKSUM_SUPPORT_TCP |
@@ -975,7 +971,7 @@ static void eth_xlnx_gem_set_initial_nwcfg(const struct device *dev)
 		/* [25]     RX half duplex while TX enable */
 		reg_val |= ETH_XLNX_GEM_NWCFG_HDRXEN_BIT;
 	}
-	if (dev_conf->enable_rx_chksum_offload) {
+	if (!dev_conf->disable_rx_chksum_offload) {
 		/* [24]     enable RX IP/TCP/UDP checksum offload */
 		reg_val |= ETH_XLNX_GEM_NWCFG_RXCHKSUMEN_BIT;
 	}
@@ -1153,7 +1149,7 @@ static void eth_xlnx_gem_set_initial_dmacr(const struct device *dev)
 	reg_val |= (((dev_conf->rx_buffer_size / 64) &
 		   ETH_XLNX_GEM_DMACR_RX_BUF_MASK) <<
 		   ETH_XLNX_GEM_DMACR_RX_BUF_SHIFT);
-	if (dev_conf->enable_tx_chksum_offload) {
+	if (!dev_conf->disable_tx_chksum_offload) {
 		/* [11] TX TCP/UDP/IP checksum offload to GEM */
 		reg_val |= ETH_XLNX_GEM_DMACR_TCP_CHKSUM_BIT;
 	}

drivers/ethernet/eth_xlnx_gem_priv.h

@@ -453,7 +453,8 @@ static const struct eth_xlnx_gem_dev_cfg eth_xlnx_gem##port##_dev_cfg = {\
 	.enable_sgmii_mode		= DT_INST_PROP(port, sgmii_mode),\
 	.disable_reject_fcs_crc_errors	= DT_INST_PROP(port, disable_reject_fcs_crc_errors),\
 	.enable_rx_halfdup_while_tx	= DT_INST_PROP(port, rx_halfdup_while_tx),\
-	.enable_rx_chksum_offload	= DT_INST_PROP(port, rx_checksum_offload),\
+	.disable_rx_chksum_offload	= UTIL_OR(IS_ENABLED(CONFIG_QEMU_TARGET),\
+					  DT_INST_PROP(port, disable_rx_checksum_offload)),\
 	.disable_pause_copy		= DT_INST_PROP(port, disable_pause_copy),\
 	.discard_rx_fcs			= DT_INST_PROP(port, discard_rx_fcs),\
 	.discard_rx_length_errors	= DT_INST_PROP(port, discard_rx_length_errors),\
@@ -467,7 +468,8 @@ static const struct eth_xlnx_gem_dev_cfg eth_xlnx_gem##port##_dev_cfg = {\
 	.discard_non_vlan		= DT_INST_PROP(port, discard_non_vlan),\
 	.enable_fdx			= DT_INST_PROP(port, full_duplex),\
 	.disc_rx_ahb_unavail		= DT_INST_PROP(port, discard_rx_frame_ahb_unavail),\
-	.enable_tx_chksum_offload	= DT_INST_PROP(port, tx_checksum_offload),\
+	.disable_tx_chksum_offload	= UTIL_OR(IS_ENABLED(CONFIG_QEMU_TARGET),\
+					  DT_INST_PROP(port, disable_tx_checksum_offload)),\
 	.tx_buffer_size_full		= DT_INST_PROP(port, hw_tx_buffer_size_full),\
 	.enable_ahb_packet_endian_swap	= DT_INST_PROP(port, ahb_packet_endian_swap),\
 	.enable_ahb_md_endian_swap	= DT_INST_PROP(port, ahb_md_endian_swap)\
@@ -710,7 +712,7 @@ struct eth_xlnx_gem_dev_cfg {
 	bool				enable_sgmii_mode : 1;
 	bool				disable_reject_fcs_crc_errors : 1;
 	bool				enable_rx_halfdup_while_tx : 1;
-	bool				enable_rx_chksum_offload : 1;
+	bool				disable_rx_chksum_offload : 1;
 	bool				disable_pause_copy : 1;
 	bool				discard_rx_fcs : 1;
 	bool				discard_rx_length_errors : 1;
@@ -724,7 +726,7 @@ struct eth_xlnx_gem_dev_cfg {
 	bool				discard_non_vlan : 1;
 	bool				enable_fdx : 1;
 	bool				disc_rx_ahb_unavail : 1;
-	bool				enable_tx_chksum_offload : 1;
+	bool				disable_tx_chksum_offload : 1;
 	bool				tx_buffer_size_full : 1;
 	bool				enable_ahb_packet_endian_swap : 1;
 	bool				enable_ahb_md_endian_swap : 1;